MC74LCX652 Datasheet | onsemi

ON Semiconductort Low- Voltage CMOS Octal Transceiver/Registered Transceiver With Dual Enable With 5 V- Tolerant Inputs and Outputs (3- State, Non- Inverting) The MC74LCX652 is a high performance, non- inverting octal transceiver/registered transceiver operating from a 2.3 to 3.6 V supply. High impedance TTL patible inputs significantly reduce current loading to input drivers while TTL patible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX652 inputs to be safely driven from 5 V devices. The MC74LCX652 is suitable for memory address driving and all TTL level bus oriented transceiver applications. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes from a LOW- to- HIGH logic level. Two Output Enable pins (OEBA, OEAB) are provided to control the transceiver outputs. In the transceiver mode, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls (SBA, SAB) can multiplex stored and real- time (transparent mode) data. In the isolation mode (both outputs disabled), A data may be stored in the B register or B data may be stored in the A register. When in the real- time mode, it is possible to store data without using the internal registers by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input (data retention is not guaranteed in this mode). - Designed for 2.3 to 3.6 V VCC Operation - 5 V Tolerant - Interface Capability With 5 V TTL Logic - Supports Live Insertion and Withdrawal - IOFF Specification Guarantees High Impedance When VCC = 0 V - LVTTL patible - LVCMOS patible - 24 m A Balanced Output Sink and Source Capability - Near Zero Static Supply Current in All Three Logic States (10 μA) Substantially Reduces System Power Requirements - Latchup Performance Exceeds 500 m A - ESD Performance: Human Body Model >2000 V; Machine Model >200 V LOW- VOLTAGE CMOS OCTAL TRANSCEIVER/...