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MC74LVX138 - 3-to-8 Line Decoder

Features

  • High Speed: tPD = 5.5 ns (Typ) at VCC = 3.3 V.
  • Low Power Dissipation: ICC = 4 mA (Max) at TA = 25 °C.
  • Power Down Protection Provided on Inputs.
  • Balanced Propagation Delays.
  • Low Noise: VOLP = 0.5 V (Max).
  • Pin and Function Compatible with Other Standard Logic Families.
  • Latchup Performance Exceeds 300 mA.
  • ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V.
  • These Devices are Pb.
  • Free and are RoHS.

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Datasheet Details

Part number MC74LVX138
Manufacturer onsemi
File Size 214.26 KB
Description 3-to-8 Line Decoder
Datasheet download datasheet MC74LVX138 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MC74LVX138 3-to-8 Line Decoder With 5V−Tolerant Inputs The MC74LVX138 is an advanced high speed CMOS 3−to−8 line decoder. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. When the device is enabled, three Binary Select inputs (A0 − A2) determine which one of the outputs (O0 − O7) will go Low. When enable input E3 is held Low or either E2 or E1 is held High, decoding function is inhibited and all outputs go high. E3, E2, and E1 inputs are provided to ease cascade connection and for use as an address decoder for memory systems. Features • High Speed: tPD = 5.5 ns (Typ) at VCC = 3.3 V • Low Power Dissipation: ICC = 4 mA (Max) at TA = 25 °C • Power Down Protection Provided on Inputs • Balanced Propagation Delays • Low Noise: VOLP = 0.
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