datasheet4u.com

900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf




  ON Semiconductor Electronic Components Datasheet  

NB100LVEP222 Datasheet

1:15 Differential ECL/PECL /1 /2 Clock Driver

No Preview Available !

NB100LVEP222 pdf
NB100LVEP222
2.5 V/3.3 V 1:15 Differential
ECL/PECL ÷1/÷2 Clock Driver
The NB100LVEP222 is a low skew 1:15 differential ÷1/÷2 ECL
fanout buffer designed with clock distribution in mind. The
LVECL/LVPECL input signal pairs can be used in a differential
configuration or single−ended (with VBB output reference bypassed
and connected to the unused input of a pair). Either of two fully
differential clock inputs may be selected. Each of the four output
banks of 2, 3, 4, and 6 differential pairs may be independently
configured to fanout 1X or 1/2X of the input frequency. When the
output banks are configured with the B1 mode, data can also be
distributed. The LVEP222 specifically guarantees low output to output
skew. Optimal design, layout, and processing minimize skew within a
device and from lot to lot. This device is an improved version of the
MC100LVE222 with higher speed capability and reduced skew.
The fsel pins and CLK_Sel pin are asynchronous control inputs.
Any changes may cause indeterminate output states requiring an MR
pulse to resynchronize any 1/2X outputs (See Figure 3). Unused
output pairs should be left unterminated (open) to reduce power and
switching noise.
The NB100LVEP222, as with most ECL devices, can be operated
from a positive VCC/VCC0 supply in LVPECL mode. This allows the
LVEP222 to be used for high performance clock distribution in
+2.5/3.3 V systems. In a PECL environment series or Thevenin line,
terminations are typically used as they require no addwiwtwi.oDantaaShleept4oU.wcomer
supplies. For more information on using PECL, designers should refer
to Application Note AN1406/D. For a SPICE model, refer to
Application Note AN1560/D.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single−ended LVPECL input conditions, the
unused differential input is connected to VBB as a switching reference
voltage. VBB may also rebias AC coupled inputs. When used, decouple
VBB and VCC/VCC0 via a 0.01 mF capacitor and limit current sourcing
or sinking to 0.5 mA. When not used, VBB should be left open.
Single−ended CLK input operation is limited to a VCC/VCC0 3.0 V in
LVPECL mode, or VEE v −3.0 V in NECL mode.
20 ps Output−to−Output Skew
85 ps Part−to−Part Skew
Selectable 1x or 1/2x Frequency Outputs
LVPECL Mode Operating Range:
VCC/VCC0 = 2.375 V to 3.8 V with VEE = 0 V
NECL Mode Operating Range:
VCC/VCC0 = 0 V with VEE = −2.375 V to −3.8 V
Internal Input Pulldown Resistors
Performance Upgrade to ON Semiconductor’s MC100LVE222
VBB Output
Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
October, 2005− Rev. 9
1
http://onsemi.com
MARKING
DIAGRAM*
52−LEAD LQFP
THERMALLY ENHANCED
CASE 848H
FA SUFFIX
52
NB100
LVEP222
AWLYYWWG
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*For additional information, see Application Note
AND8002/D
ORDERING INFORMATION
Device
Package Shipping
NB100LVEP222FA LQFP−52 160 Units/Tray
NB100LVEP222FAR2 LQFP−52 1500/Tape & Reel
NB100LVEP222FAG LQFP−52 160 Units/Tray
(Pb−Free)
NB100LVEP222FARG LQFP−52 1500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NB100LVEP222/D


  ON Semiconductor Electronic Components Datasheet  

NB100LVEP222 Datasheet

1:15 Differential ECL/PECL /1 /2 Clock Driver

No Preview Available !

NB100LVEP222 pdf
NB100LVEP222
VCC0
Qb2
Qb2
Qb1
Qb1
Qb0
Qb0
VCC0
Qa1
Qa1
Qa0
Qa0
VCC0
39 38 37 36 35 34 33 32 31 30 29 28 27
40 26
41 25
42 24
43 23
44 22
45 21
46
NB100LVEP222
20
47 19
48 18
49 17
50 16
51 15
52 14
1 2 3 4 5 6 7 8 9 10 11 12 13
Qd0
Qd0
Qd1
Qd1
Qd2
Qd2
Qd3
Qd3
Qd4
Qd4
Qd5
Qd5
VCC0
All VCC, VCC0, and VEE pins must be externally connected to appropriate Power Supply to guarantee proper operation.VCC pin internally
connected to VCC0 pins. The thermally conductive exposed pad on package bottom (see package case drawing) must be attached to a
heat−sinking conduit. This exposed pad is electrically connected to VEE internally.
Figure 1. 52−Lead LQFP Pinout (Top View)
PIN DESCRIPTION
PIN
CLK0*, CLK0**
CLK1*, CLK1**
CLK_Sel*
MR*
Qa0:1, Qa0:1
Qb0:2, Qb0:2
Qc0:3, Qc0:3
Qd0:5, Qd0:5
fseln*
VBB
VCC, VCC0
VEE***
NC
FUNCTION
ECL Differential Input Clock
ECL Differential Input Clock
ECL Clock Select
ECL Master Reset
ECL Differential Outputs
ECL Differential Outputs
ECL Differential Outputs
ECL Differential Outputs
ECL 1 or 2 Select
Reference Voltage Output
Positive Supply, VCC = VCC0
Negative Supply
No Connect
FUNCTION TABLE
Input
Function
LH
MR
CLK_Sel
fseln
Active
CLK0
÷1
Reset
CLK1
÷2
* Pins will default LOW when left open.
** Pins will default HIGH when left open.
*** The thermally conductive exposed pad on the bottom of
the package is electrically connected to VEE internally.
http://onsemi.com
2


Part Number NB100LVEP222
Description 1:15 Differential ECL/PECL /1 /2 Clock Driver
Maker ON Semiconductor
Total Page 10 Pages
PDF Download
NB100LVEP222 pdf
NB100LVEP222 Datasheet PDF
[partsNo] view html
View PDF for Mobile








Similar Datasheet

1 NB100LVEP221 1:20 Differential HSTL/ECL/PECL Clock Driver ON Semiconductor
ON Semiconductor
NB100LVEP221 pdf
2 NB100LVEP222 1:15 Differential ECL/PECL /1 /2 Clock Driver ON Semiconductor
ON Semiconductor
NB100LVEP222 pdf
3 NB100LVEP224 1:24 Differential ECL/PECL Clock Driver ON Semiconductor
ON Semiconductor
NB100LVEP224 pdf





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy