NB3N4666C - 3.3 V Quad LVCMOS Differential Line Receiver Translator

ON Semiconductor

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Datasheet Details

Part number	NB3N4666C
Manufacturer	ON Semiconductor
File Size	117.89 KB
Description	3.3 V Quad LVCMOS Differential Line Receiver Translator
Datasheet	NB3N4666C-ONSemiconductor.pdf

NB3N4666C Product details

Description

The NB3N4666C is a quad channel LVDS line receiver/translator offering data rates up to 400 Mbps (200 MHz) and low power consumption.The NB3N4666C receiver incorporates input fail safe protection circuit that provides a known output voltage under input open circuit, short and terminated (100 W) conditions. LVDS, LVDS, LVPECL and HCSL and translates them to a single ended, 3.3 V LVCMOS.

Features

Accepts M.
LVDS, LVDS, LVPECL and HCSL Differential Input Signal Levels.
Maximum Data Rate of 400 Mbps.
Maximum Clock Frequency of 200 MHz.
25 ps Typical Channel.
to.
Channel Skew.
3.3 ns Maximum Propagation Delay.
3.3 V ±10% Power Supply.
High Impedance Outputs When Disabled.
Low Quiescent Power < 10 mW Typical.
Supports Open, Short, and Terminated Input Fail.
safe.
40.

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Published: Jun 28, 2016 |