NB3N508S Datasheet | onsemi

Description The NB3N508S is a high precision, low phase noise Voltage Controlled Crystal Oscillator (VCXO) and phase lock loop (PLL) that generates 216 MHz M- LVDS output from a 27 MHz crystal. The ±100 ppm output pullable range is obtained using the VIN pin of the VCXO with usable range from 0 V to 3.3 V. The VCXO input pin VIN is a high- impedance input that can be driven directly from a pulse width modulated RC integrator circuit. The NB3N508S is designed primarily for data and clock recovery applications within end products such as ADSL modems, set- top box receivers, and tele systems. This device is housed in 5.0 mm x 4.4 mm narrow body TSSOP- 16 pin package. Features http://onsemi. MARKING DIAGRAM 16 1 TSSOP- 16 DT SUFFIX CASE 948F 1 16 NB3N 508S ALYWG G - - - - - - - - - - Pure Edge Clock Family Provides Accuracy and Precision Performs Precision Clock Multiplication from 27 MHz Crystal Uses 27 MHz Fundamental Mode Crystal External Loop Filter is Not Required 216 MHz M- LVDS Output .. VCXO with Pull Range $100 ppm 0 V to 3.3 V VCXO Tuning Voltage Range Capabilities Phase Noise: Offset Noise Power 100 Hz - 80 d Bc 1 k Hz - 88 d Bc 10 k Hz - 105 d Bc 100 k Hz - 106 d Bc 1 MHz - 120 d Bc 10 MHz - 145 d Bc Operating Range 3.3 V $5% These are Pb- Free Devices- A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb- Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. © Semiconductor ponents Industries, LLC, 2006 October, 2006 - Rev. 0 Publication Order Number: NB3N508S/D VDD X1 27 MHz Crystal X2 VIN BN VCXO CLK Phase Detector Charge Pump VCO M- LVDS Output CLK Figure 1. NB3N508S Simplified Logic Diagram - For additional information on our Pb- Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi. X1 VDD VDD...