Overview: NB3N65027 3.3V Programmable 3-PLL Clock Synthesizer with 6 LVTTL/LVCMOS Outputs w/OE The NB3N65027 is a LVCMOS PLL−synthesized clock generator. It accepts a 10 MHz to 27 MHz clock or fundamental mode crystal as the reference source and drives three independent, low noise phase−locked loops (PLLs).
Control lines ACSx, BCSx and CCS will select their appropriate bank output frequencies. ACS1 and BCS1 are two−level LVTTL/LVCMOS inputs, High and Low. ACS0, BCS0 and CCS are three−level LVCMOS inputs, High, Mid and Low.
The NB3N65027 has three independent LVTTL/LVCMOS output banks of two outputs each. Banks A and B offer a 1X and a 1/2X output. Using a 25 MHz crystal, the selectable output frequencies range from 16 2/3 MHz to 133 1/3 MHz. A 12.5 MHz crystal offers from 8 1/3 MHz to 66 2/3 MHz. In addition, the NB3N65027 will generate a buffered reference LVTTL/LVCMOS output, REFOUT, 10 MHz to 27 MHz. See Tables 2 through 9 for the variety of available output frequencies. The OE pin, when set LOW, will disable the output drivers to high impedance.
The NB3N65027 operates from a single +3.3 V supply across the operating temperature range from −40°C to +85°C, and is offered in a QSOP−20 RoHS pliant package.
The NB3N65027 provides the optimum bination of low cost, flexibility, and high performance for Network, PCI and SDRAM applications.
