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  ON Semiconductor Electronic Components Datasheet  

NB3V1102C Datasheet

3.3V/2.5V/1.8V LVCMOS Low Skew Fanout Buffer

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NB3V110xC Series
3.3V/2.5V/1.8V LVCMOS
Low Skew Fanout Buffer
Family
Description
The NB3V110xC are a modular, high−performance, low−skew,
general purpose LVCMOS clock buffer family. The family of devices
is designed with a modular approach. Four different fan−out
variations, 1:2, 1:3, 1:4, 1:6 and 1:8, are available. All of the devices
are pin compatible to each other for easy handling. All family
members share the same high performing characteristics like low
additive jitter, low skew, and wide operating temperature range. The
NB3V110xC supports an asynchronous output enable control (OE)
which switches the outputs into a low state when OE is low. The
NB3V110xC devices operate in a 3.3 V, 2.5 V and 1.8 V environment
and are characterized for operation from −40°C to 105°C.
Features
Operating Temperature Range: –40°C to 105°C
High−Performance 1:2, 1:3, 1:4, 1:6, 1:8 LVCMOS Clock Buffer
Available in 8−, 14−, 16−Pin TSSOP and WDFN8 Packages
Very Low Output−to−Output Skew < 50 ps
Very Low Additive Jitter < 200 fs
Supply Voltage: 3.3 V, 2.5 V or 1.8 V
fmax = 250 MHz for 3.3 V; fmax = 180 MHz for 2.5 V;
fmax = 133 MHz for 1.8 V
These Devices are Pb−Free and are RoHS Compliant
BLOCK DIAGRAM
CLKIN
LV
CMOS
LV
CMOS
Q0
LV
CMOS
Q1
LV
CMOS
Q2
LV
CMOS
Q3
S
S
S
LV
CMOS
Qn
OE
www.onsemi.com
TSSOP−8
DT SUFFIX
CASE 948S
TSSOP−14
DT SUFFIX
CASE 948G
TSSOP−16
DT SUFFIX
CASE 948F
WDFN8, 2x2
MT SUFFIX
CASE 511AT
MARKING DIAGRAMS
8
10x
YWW
AG
1
14
1106
V
ALYWG
G
1
16
1108
V
ALYWG
G
1
TSSOP−8
TSSOP−14
TSSOP−16
1
0X MG
G
WDFN8
A = Assembly Location
M = Date Code
L = Wafer Lot
Y = Year
W, WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2017
January, 2017 − Rev. 3
1
Publication Order Number:
NB3V1102C/D


  ON Semiconductor Electronic Components Datasheet  

NB3V1102C Datasheet

3.3V/2.5V/1.8V LVCMOS Low Skew Fanout Buffer

No Preview Available !

CLKIN
OE
Q0
GND
1
2
3
4
NB3V1102C
NB3V1103C
NB3V1104C
8 Q1
7 NC/Q3
6 VDD
5 NC/Q2
TSSOP−8 and WDFN8
NB3V110xC Series
CLKIN 1
14 Q1
OE 2
13 Q3
Q0 3
12 VDD
GND 4
NB3V1106C
11 Q2
VDD 5
10 GND
Q4 6
9 Q5
GND 7
TSSOP−14
8 VDD
Figure 1. Pin Configuration
CLKIN
OE
Q0
GND
VDD
Q4
GND
Q6
1
2
3
4
5
6
7
8
NB3V1108C
TSSOP−16
16 Q1
15 Q3
14 VDD
13 Q2
12 GND
11 Q5
10 VDD
9 Q7
Table 1. PIN DESCRIPTION
LVCMOS Clock LVCMOS Clock
Input
Output Enable
Devices
CLKIN
OE
NB3V1102C
1
2
NB3V1103C
1
2
NB3V1104C
1
2
NB3V1106C
1
2
NB3V1108C
1
2
NOTE: Pins not mentioned in the table are NC.
LVCMOS Clock Output
Q0, Q1, ... Q7
3, 8
3, 8, 5
3, 8, 5, 7
3, 14, 11, 13, 6, 9
3, 16, 13, 15, 6, 11, 8, 9
Table 2. OUTPUT LOGIC TABLE
INPUTS
CLKIN
X
L
H
OE
L
H
H
Device
Supply Voltage
VDD
6
6
6
5, 8, 12
5, 10, 14
OUTPUTS
Qn
L
L
H
Table 3. ATTRIBUTES
Characteristic
Value
ESD Protection
Human Body Model (HBM) per ANSI/ESDA/JEDEC JS−001−2014
Charged Device Model (CDM) per ANSI/ESDA/JEDEC JS−002−2014
5000
1500
Moisture Sensitivity, Indefinite Time Out of Dry Pack (Note 1)
Level 1
Meets or exceeds JEDEC Spec JESD78D (LU) IC Latchup Test
1. JEDEC standard multilayer board – 2S2P (2 signal, 2 power) with a large copper heat spreader (20 mm2, 2 oz.)
Device
Ground
GND
4
4
4
4, 7, 10
4, 7, 12
Unit
V
V
www.onsemi.com
2


Part Number NB3V1102C
Description 3.3V/2.5V/1.8V LVCMOS Low Skew Fanout Buffer
Maker ON Semiconductor
Total Page 13 Pages
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