NB6L11S Datasheet Input to LVDS Fanout Buffer/Translator

Manufacturer: onsemi

NB6L11S input to lvds fanout buffer/translator by onsemi - Datasheet Preview

Datasheet Details

Part number	NB6L11S
Manufacturer	onsemi
File Size	316.46 KB
Description	Input to LVDS Fanout Buffer/Translator
Datasheet	NB6L11S Datasheet

Overview

NB6L11S VOLTAGE (130 mV/div) 2.5 V 1:2 AnyLevel] Input to LVDS Fanout Buffer / Translator The NB6L11S is a differential 1:2 clock or data receiver and will accept AnyLevel™ input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS.

These signals will be translated to LVDS and two identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively.

As such, the NB6L11S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications.

Key Features

Input Clock Frequency > 2.0 GHz.
Input Data Rate > 2.5 Gb/s.
RMS Clock Jitter.
0.5 ps, Typical.
622 Mb/s Data Dependent Jitter.
6 ps, Typical.
380 ps Typical Propagation Delay.
120 ps Typical Rise and Fall Times.
Single Power Supply; VCC = 2.5 V " 5%.
These are Pb.
Free Devices Device DDJ = 10 ps www. onsemi. com 1 QFN.
16 MN SUFFIX CASE 485G.

More Datasheets from onsemi

Part Number	Description
NB6L11	2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL
NB6L11M	Differential CML Fanout Buffer
NB6L14	Differential 1:4 LVPECL Fanout Buffer
NB6L14M	Differential 1:4 CML Fanout Buffer
NB6L14S	2.5V 1:4 AnyLevel Differential Input to LVDS Fanout Buffer/Translator
NB6L16	6GHz/6Gbps 2.5V/3.3V Multi-level Input to Differential Lvecl Clock or Data Translator/receiver/driver Buffer
NB6L239	2.5V / 3.3V Any Differential Clock IN to Differential LVPECL OUT Clock Divider
NB6L295	2.5V / 3.3V Dual Channel Programmable Clock/Data Delay
NB6L295M	2.5V / 3.3V Dual Channel Programmable Clock/Data Delay
NB6L56	2.5V / 3.3V Dual 2:1 Differential Clock / Data Multiplexer