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NB6L16 - 6GHz/6Gbps 2.5V/3.3V Multi-level Input to Differential Lvecl Clock or Data Translator/receiver/driver Buffer

Description

Pin 1 2 Name NC D I/O LVDS, CML, LVPECL, LVNECL, LVTTL, LVCMOS Input LVDS, CML, LVPECL, LVNECL, LVTTL, LVCMOS Input ECL Output ECL Output Default State

LOW Description No Connect.

Features

  • perature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. Vth is applied to the complementary input when operating in single.
  • ended mode. 9. VCMR minimum varies 1:1 with VEE, VCMR maximum varies 1:1 with VCC. 10. Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to.
  • 0.5 V. 11. All input and output pins.

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Datasheet preview – NB6L16

Datasheet Details

Part number NB6L16
Manufacturer onsemi
File Size 143.36 KB
Description 6GHz/6Gbps 2.5V/3.3V Multi-level Input to Differential Lvecl Clock or Data Translator/receiver/driver Buffer
Datasheet download datasheet NB6L16 Datasheet
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Full PDF Text Transcription

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m o .c 4U 2.5V / 3.3V tMultilevel Input to e Differential e LVPECL/LVNECL h Clock or S Data a t Receiver/Driver/Translator a Buffer .D w The NB6L16 is a high precision, low power ECL differential clock w or data receiver/driver/translator buffer. The device is functionally w equivalent to the EL16, EP16, LVEL16 and NBSG16 devices. With NB6L16 http://onsemi.com MARKING DIAGRAMS* 8 output transition times of 70 ps, it is ideally suited for high frequency, low power systems. The device is targeted for Backplane buffering, GbE clock/data distribution, Fibre Channel distribution and SONET clock/data distribution applications. Input accept LVNECL (Negative ECL), LVPECL (Positive ECL), LVTTL, LVCMOS, CML, or LVDS. Outputs are 800 mV ECL signals.
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