NB6N14S Datasheet Differential Input to LVDS Fanout Buffer/Translator

Manufacturer: onsemi

NB6N14S differential input to lvds fanout buffer/translator by onsemi - Datasheet Preview

Datasheet Details

Part number	NB6N14S
Manufacturer	onsemi
File Size	367.51 KB
Description	Differential Input to LVDS Fanout Buffer/Translator
Datasheet	NB6N14S Datasheet

Overview

NB6N14S 3.3 V 1:4 AnyLevelt Differential Input to LVDS Fanout Buffer/Translator The NB6N14S is a differential 1:4 Clock or Data Receiver and will accept AnyLevelt differential input signals: LVPECL, CML or LVDS.

These signals will be translated to LVDS and four identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively.

As such, the NB6N14S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications.

Key Features

Maximum Input Clock Frequency > 2.0 GHz.
Maximum Input Data Rate > 2.5 Gb/s.
1 ps Maximum RMS Clock Jitter.
Typically 10 ps Data Dependent Jitter.
380 ps Typical Propagation Delay.
120 ps Typical Rise and Fall Times.
VREF_AC Reference Output.
TIA/EIA.
644 Compliant.
Functionally Compatible with Existing 3.3 V LVEL, LVEP, EP, and SG Devices.
These are Pb.
Free Devices Device DDJ = 10 ps htt.

More Datasheets from onsemi

Part Number	Description
NB6N11S	Input to LVDS Fanout Buffer/Translator
NB6N239S	3.3 V, 3.0 GHz Any Differential Clock IN to LVDS OUT Clock Divider
NB6HQ14M	2.5V 5GHz / 6.5Gbps Differential Input to 1.8V / 2.5V 1:4 CML Clock / Data Fanout Buffer
NB6L11	2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL
NB6L11M	Differential CML Fanout Buffer
NB6L11S	Input to LVDS Fanout Buffer/Translator
NB6L14	Differential 1:4 LVPECL Fanout Buffer
NB6L14M	Differential 1:4 CML Fanout Buffer
NB6L14S	2.5V 1:4 AnyLevel Differential Input to LVDS Fanout Buffer/Translator
NB6L16	6GHz/6Gbps 2.5V/3.3V Multi-level Input to Differential Lvecl Clock or Data Translator/receiver/driver Buffer