NCD57256 Overview
The device accepts 3.3 V to 20 V bias voltage and signal levels on the input side and up to 32 V bias voltage on the output side. The device accepts plementary inputs and offers separate pins for Disable and Dead Time control for system design convenience. Drivers are available in wide body SOIC−16 and narrow body SOIC−16 package.
NCD57256 Key Features
- High Peak Output Current (±6.5 A-, ±3.5 A-)
- Configurable as a Dual Low-Side or Dual High-Side or Half-Bridge
- Programmable Overlap or Dead Time control
- Disable Pin to Turn Off Outputs for Power Sequencing
- ANB Function to Offer Flexibility to Set up the Driver as
- IGBT/MOSFET Gate Clamping during Short Circuit
- Short Propagation Delays with Accurate Matching
- Tight UVLO Thresholds on all Power Supplies
- 3.3 V, 5 V, and 15 V Logic Input
- 2.5 or 5 kVrms- Galvanic Isolation from Input to each Output