NCP4896 Datasheet | onsemi

atures a low- power consumption shutdown mode, which is achieved by driving the shutdown pin with logic Low. The NCP4896 contains circuitry to prevent from “pop and click” noise that would otherwise occur during turn- on and turn- off transitions. It is also efficient when switching modes from BTL to SE and SE to BTL. For maximum flexibility, the part provides an externally controlled gain (with resistors), as well as an externally controlled turn- on time (with bypass capacitor). Due to its excellent PSRR, it can be directly connected to the battery, saving the use of an LDO. Features http://onsemi. MARKING DIAGRAM 1 9- PIN FLIP- CHIP FC SUFFIX CASE 499AL XXX A Y WW A3 XXX AYWW A1 C1 = Specific Device Code = Assembly Location = Year = Work Week PIN CONNECTIONS 9- PIN FLIP- CHIP CSP A1 SE/BTL B1 VP C1 INM A2 BYP B2 NC C2 SD (Top View) A3 OUTB B3 VM C3 OUTA - - - - - - - - - - - Single- Ended or Differential Control 1.0 W to an 8.0 W BTL Load from a 5.0 V Power Supply Excellent PSRR: Direct Connection to the Battery Ultra Low Current Shutdown Mode 2.2 V- 5.5 V Operation External Gain Configuration Capability External Turn- on Time Configuration Capability Thermal Overload Protection Circuitry Up to 1.0 n F Capacitive Load Driving Capability “Pop and Click” Noise Protection Circuit This is a Pb- Free Device ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 15 of this data sheet. Typical Applications - Portable Electronic Devices - PDAs - Mobile Phones © Semiconductor ponents Industries, LLC, 2005 March, 2005 - Rev. 3 Publication Order Number: NCP4896/D RF 20 k W VP Cs Cin Rin VP BYPASS VP BYPASS Audio Input Cb 1 m F VMC BRIDGE R1 20 k W 8.0 W LOUD SPEAKER SHUTDOWN CONTROL 20 k W BYPASS VM - + R2 16 W or 32 W...