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NCV8161 Datasheet

LDO Regulator

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NCV8161
LDO Regulator - Ultra-Low
Noise, High PSRR, RF and
Analog Circuits
450 mA
The NCV8161 is a linear regulator capable of supplying 450 mA
output current. Designed to meet the requirements of RF and analog
circuits, the NCV8161 device provides low noise, high PSRR, low
quiescent current, and very good load/line transients. The device is
designed to work with a 1 mF input and a 1 mF output ceramic capacitor.
It is available in TSOP5 and XDFN4 packages.
Features
Operating Input Voltage Range: 1.9 V to 5.5 V
Available in Fixed Voltage Option: 1.8 V to 5.14 V
±2% Accuracy Over Temperature
Ultra Low Quiescent Current Typ. 18 mA
Standby Current: Typ. 0.1 mA
Very Low Dropout: 225 mV at 450 mA
Ultra High PSRR: Typ. 98 dB at 20 mA, f = 1 kHz
Ultra Low Noise: 10 mVRMS
Stable with a 1 mF Small Case Size Ceramic Capacitors
Available in TSOP5 and XDFN4 Packages
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable; Device Temperature Grade 1: 40°C to
+125°C Ambient Operating Temperature Range
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Parking Camera Modules
Wireless Handsets, Wireless LAN, Bluetooth®, Zigbee®
Automotive Infotainment Systems
Other Battery Powered Applications
VIN
IN
OUT
CIN
1 mF
Ceramic
ON
OFF
NCV8161
EN
GND
VOUT
COUT
1 mF
Ceramic
Figure 1. Typical Application Schematic
www.onsemi.com
5
1
TSOP5
CASE 483
MARKING
DIAGRAM
5
XXXAYWG
G
1
XXX = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
G = PbFree Package
(Note: Microdot may be in either location)
XDFN4
XX M
1
CASE 711AJ
1
XX = Specific Device Code
M = Date Code
PIN CONNECTIONS
IN 1
5 OUT
GND 2
EN 3
4 NC/ADJ
(Top View)
IN
EN
4
3
EPAD
1
2
OUT
GND
(Top View)
© Semiconductor Components Industries, LLC, 2016
September, 2019 Rev. 1
ORDERING INFORMATION
See detailed ordering and shipping information on page 14 of
this data sheet.
1
Publication Order Number:
NCV8161/D


  ON Semiconductor Electronic Components Datasheet  

NCV8161 Datasheet

LDO Regulator

No Preview Available !

IN
EN
NCV8161
BANDGAP
REFERENCE
ENABLE
LOGIC
INTEGRATED
SOFTSTART
THERMAL
SHUTDOWN
MOSFET
DRIVER WITH
CURRENT LIMIT
OUT
* ACTIVE DISCHARGE
Version A only
EN
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
TSOP5
Pin No.
XDFN4
Pin
Name
Description
1
4
IN
Input voltage supply pin
5
1
OUT Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor.
3
3
EN
Chip enable: Applying VEN < 0.4 V disables the regulator, Pulling VEN > 1.2 V enables the LDO.
2
2
GND Common ground connection
4
N/C Not connected. This pin can be tied to ground to improve thermal dissipation.
EP
EPAD Exposed Pad. Exposed pad can be tied to ground plane for better power dissipation.
www.onsemi.com
2


Part Number NCV8161
Description LDO Regulator
Maker ON Semiconductor
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