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PCS3P622Z09C - Peak EMI Reduction IC

Download the PCS3P622Z09C datasheet PDF. This datasheet also covers the PCS3P622Z05B variant, as both devices belong to the same peak emi reduction ic family and are provided as variant models within a single manufacturer datasheet.

Description

PCS3P622Z05/09 is a versatile, 3.3 V Zero delay buffer designed to distribute low frequency Timing

Safe clocks with Peak EMI reduction.

pin version, accepts one reference input and drives out five low skew Timing

Safe clocks.

Features

  • Low Frequency Clock Distribution with Timing.
  • Safe Peak EMI Reduction.
  • Input Frequency Range: 4 MHz.
  • 20 MHz.
  • Multiple Low Skew Timing.
  • Safe Outputs: PCS3P622Z05: 5 Outputs PCS3P622Z09: 9 Outputs.
  • External Input.
  • Output Delay Control Option.
  • Supply Voltage: 3.3 V ± 0.3 V.
  • Commercial and Industrial Temperature Range.
  • Packaging Information: ASM3P622Z05: 8 pin SOIC, and TSSOP ASM3P622Z09: 16 pin SOIC, and T.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (PCS3P622Z05B-ONSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
PCS3P622Z09C Low Frequency Timing-Safe Peak EMI reduction IC PulseCore Semiconductor
PCS3P622Z09B Low Frequency Timing-Safe Peak EMI reduction IC PulseCore Semiconductor
PCS3P622Z05B Low Frequency Timing-Safe Peak EMI reduction IC PulseCore Semiconductor
PCS3P622Z05C Low Frequency Timing-Safe Peak EMI reduction IC PulseCore Semiconductor
PCS3P6200A Spread Spectrum EMI reduction IC PulseCore Semiconductor

Other Datasheets by onsemi

Part Number Description
PCS3P622Z09B Peak EMI Reduction IC
PCS3P622Z05B Peak EMI Reduction IC
PCS3P622Z05C Peak EMI Reduction IC
PCS3P6200A Spread Spectrum EMI reduction IC
PCS3P623Z05A Peak EMI Reduction IC

Full PDF Text Transcription

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PCS3P622Z05B, PCS3P622Z05C, PCS3P622Z09B, PCS3P622Z09C Product Preview Low Frequency TIMING SAFEt Peak EMI Reduction IC Description PCS3P622Z05/09 is a versatile, 3.3 V Zero−delay buffer designed to distribute low frequency Timing−Safe clocks with Peak EMI reduction. PCS3P622Z05 is an eight−pin version, accepts one reference input and drives out five low−skew Timing−Safe clocks. PCS3P622Z09 accepts one reference input and drives out nine low−skew Timing−Safe clocks. PCS3P622Z05/09 has a DLY_CTRL for adjusting the Input−Output clock delay, depending upon the value of capacitor connected at this pin to GND. PCS3P622Z05/09 operates from a 3.3 V supply and is available in two different packages, as shown in the ordering information table, over commercial and Industrial temperature range.
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