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PCS3P622Z09C - Peak EMI Reduction IC

Download the PCS3P622Z09C datasheet PDF (PCS3P622Z05B included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for peak emi reduction ic.

Description

PCS3P622Z05/09 is a versatile, 3.3 V Zero delay buffer designed to distribute low frequency Timing

Safe clocks with Peak EMI reduction.

pin version, accepts one reference input and drives out five low skew Timing

Safe clocks.

Features

  • Low Frequency Clock Distribution with Timing.
  • Safe Peak EMI Reduction.
  • Input Frequency Range: 4 MHz.
  • 20 MHz.
  • Multiple Low Skew Timing.
  • Safe Outputs: PCS3P622Z05: 5 Outputs PCS3P622Z09: 9 Outputs.
  • External Input.
  • Output Delay Control Option.
  • Supply Voltage: 3.3 V ± 0.3 V.
  • Commercial and Industrial Temperature Range.
  • Packaging Information: ASM3P622Z05: 8 pin SOIC, and TSSOP ASM3P622Z09: 16 pin SOIC, and T.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (PCS3P622Z05B-ONSemiconductor.pdf) that lists specifications for multiple related part numbers.

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Full PDF Text Transcription

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PCS3P622Z05B, PCS3P622Z05C, PCS3P622Z09B, PCS3P622Z09C Product Preview Low Frequency TIMING SAFEt Peak EMI Reduction IC Description PCS3P622Z05/09 is a versatile, 3.3 V Zero−delay buffer designed to distribute low frequency Timing−Safe clocks with Peak EMI reduction. PCS3P622Z05 is an eight−pin version, accepts one reference input and drives out five low−skew Timing−Safe clocks. PCS3P622Z09 accepts one reference input and drives out nine low−skew Timing−Safe clocks. PCS3P622Z05/09 has a DLY_CTRL for adjusting the Input−Output clock delay, depending upon the value of capacitor connected at this pin to GND. PCS3P622Z05/09 operates from a 3.3 V supply and is available in two different packages, as shown in the ordering information table, over commercial and Industrial temperature range.
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