SN74LS174 Datasheet, ON Semiconductor

where the true output only is required and the Clock and Master Reset are common to all storage elements. TRUTH TABLE .

The LS174 consists of six edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock (CP) and Master Reset (MR) are common to all flip-flops. Each D input’s state is transferred to the corresponding flip-flop’s output following the.