MC8051 - IP Core

Description

System clock.

Only rising edge used.

Asynchronous reset of all flip-flops.

Features

Fully synchronous design Instruction set compatible to the industry standard 8051 microcontroller Optimized architecture enables fast one to four clocks per OP code Up to 10 times faster due to completely new architecture User selectable number of timers/counters as well as serial interface units Active timer/counter and serial interface units selectable via additional special function register Optional implementation of the multiply command (MUL) using a parallel multiplier unit Optional implem.

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MC8051 IP Core by Oregano - Datasheet Preview — Datasheet preview – MC8051

Datasheet Details

Part number	MC8051
Manufacturer	Oregano
File Size	175.35 KB
Description	IP Core
Datasheet	MC8051 Datasheet
Additional preview pages of the MC8051 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com Design & Consulting GesmbH MC8051 IP Core Synthesizeable VHDL Microcontroller IP-Core User Guide Web: http://oregano.at/services/8051.htm Contact: mc8051@oregano.at Version 1.1 June 2002 www.DataSheet4U.

Published: Jan 8, 2008 |