OX9160 Datasheet | Oxford Semiconductor

FEATURES - - - - - - - 33MHz, 32-bit target PCI controller. Fully PCI 2.2 and PCI Power Management 1.0 pliant. 8- or 32-bit pass- through Local bus. IEEE1284 parallel port. Parallel port supports EPP mode for maximum data transfer rate to printers, removable drives etc. Most operations plete within one PCI frame (no retries). Supports shared interrupts - - - - - - - - - 12 multi-purpose I/O pins which can be configured as interrupt input pins. EEPROM interface for optional reconfiguration. Local bus operation via I/O or memory mapping. Local bus supports Intel or Motorola mode signalling. Existing driver support for mon I/O solutions. On-chip oscillator. 5.0V operation. Low power CMOS. 160 TQFP package. DESCRIPTION The OX9160 is a low-cost, general purpose PCI bridge solution designed to ease the migration to PCI of parallel port cards and instrumentation devices. It is configurable to provide either a Local bus interface or a bi-directional parallel port. Using the local bus function, legacy devices can be easily accessed throught the target PCI interface, which is pliant with version 2.2 of the PCI Bus Specification and version 1.0 of PCI Power Management Specification. All reads and writes are pleted with a minimum of PCI wait states, which ensures lower PCI bus occupancy than most similar PCI bridge solutions. The local bus can be configured to operate with either 8- or 32-bit data, using either Intel x86 style or Motorola style signalling. Alternatively the local bus can be disabled in favour of an integrated IEEE 1284 EPP parallel port. The parallel port is an IEEE 1284-pliant host interface, which supports SPP, PS2 (bidirectional) and EPP modes. The local Bus function is extremely flexible, allowing the designer to customize the addressable space, divide it into chip-select regions, access devices via I/O or memory space mapping, and adjust the timings of all operations. The default register values have been selected to support many standard peripheral...