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P4C149 - ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS

Download the P4C149 datasheet PDF. This datasheet also covers the P4C148 variant, as both devices belong to the same ultra high speed 1k x 4 static cmos rams family and are provided as variant models within a single manufacturer datasheet.

General Description

The P4C148 and P4C149 are 4,096-bit ultra high-speed static RAMs organized as 1K x 4.

Both devices have common input/output ports.

The P4C148 enters the standby mode when the chip enable (CE) goes HIGH; with CMOS input levels, power consumption is extremely low in this mode.

Key Features

  • Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times).
  • 10/12/15/20/25/35/45/55 ns (Commercial).
  • 15/20/25/35/45/55 ns Low Power Operation Single 5V ± 10% Power Supply.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (P4C148-PYRAMID.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number P4C149
Manufacturer PYRAMID
File Size 203.19 KB
Description ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS
Datasheet download datasheet P4C149 Datasheet

Full PDF Text Transcription for P4C149 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for P4C149. For precise diagrams, and layout, please refer to the original PDF.

P4C148, P4C149 ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) – 10/12/15/20/25/35/45/55 ns (Commercial) – ...

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l Access and Cycle Times) – 10/12/15/20/25/35/45/55 ns (Commercial) – 15/20/25/35/45/55 ns Low Power Operation Single 5V ± 10% Power Supply DESCRIPTION The P4C148 and P4C149 are 4,096-bit ultra high-speed static RAMs organized as 1K x 4. Both devices have common input/output ports. The P4C148 enters the standby mode when the chip enable (CE) goes HIGH; with CMOS input levels, power consumption is extremely low in this mode. The P4C149 features a fast chip select capability using CS. The CMOS memories require no clocks or refreshing, and have equal access and cycle times. Inputs are fully TTL-compatible. The RAMs operate fr