Figure 3. Pin Configuration (Top View)
Table 2. Pin Descriptions
1 VDD Power supply pin. Bypassing is required.
Input signal pin. Should be coupled with a
capacitor (eg 15 pF)
Power supply decoupling pin. Place a
capacitor as close as possible and connect
directly to the ground plane (eg 10 nF and
Ground pin. Ground pattern on the board
4 GND should be as wide as possible to reduce
5 GND Ground pin.
6 GND Ground pin.
Divided frequency output pin. This pin
7 OUT should be coupled with a capacitor (eg 100
8 GND Ground pin.
Table 3. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max Units
VDD Supply voltage
Storage temperature range -65 150 °C
ESD voltage (Human Body
Maximum input power
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage. Exposure
to absolute maximum ratings for extended periods
may affect device reliability.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Device Functional Considerations
The PE3503 takes an input signal frequency from
1500 MHz to 3500 MHz and produces an output
signal frequency one-eighth that of the supplied
input. In order for the prescaler to work properly,
several conditions need to be adhered to. It is
crucial that pin 3 be supplied with a bypass
capacitor to ground. In addition, the input and
output signals (pins 2 & 7, respectively) need to
be AC coupled via an external capacitor as shown
in the test circuit in Figure 7.
The ground pattern on the board should be made
as wide as possible to minimize ground
©2005 Peregrine Semiconductor Corp. All rights reserved.
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Document No. 70-0050-04 │ UltraCMOS™ RFIC Solutions