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Pericom Semiconductor

PI6C485352 Datasheet Preview

PI6C485352 Datasheet

500 MHz Twelve 2-to-1 Differential LVPECL Clock Multiplexer

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PI6C485352
2.5V/3.3V, 500 MHz Twelve 2-to-1 Differential LVPECL
Clock Multiplexer
Features
• Pin-to-pin compatible to ICS85352I
• FMAX ≤ 500 MHz
• Propagation Delay < 4ns
• Output-to-output skew < 100ps
• 12 pairs of differential LVPECL outputs
• Selectable differential CLK and /CLK inputs
• CLK, /CLK pair accepts LVDS, LVPECL, LVHSTL,
SSTL and HCSL input level
• Select input accept CMOS/LVTTL levels
• 2.5V/3.3V power supply
• Operating Temperature: -40oC to +85oC
• Packaging (Pb-free & Green):
— 48-pin TQFP (FA)
Description
The PI6C485352 is a high-performance low-skew LVPECL fanout
buffer. PI6C485352 features two selectable differential inputs and
translates to twelve LVPECL output pairs. The inputs can also be
conigured to single-ended with external resistor bias circuit. The
CLK input accepts LVPECL, LVDS, LVHSTL, SSTL or HCSL
signals. The PI6C485352 is ideal for differential to LVPECL
translations and/or LVPECL clock distribution.
Typical clock translation and distribution applications are data-
communications and telecommunications.
Block Diagram
SEL [0:11]
CLK0
/CLK0
CLK1
/CLK1
12
0
1
0
1
Q0
/Q0
Q11
/Q11
Pin Coniguration
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06-0184 1 PS8826฀฀฀฀฀฀฀฀฀฀07/26/06




Pericom Semiconductor

PI6C485352 Datasheet Preview

PI6C485352 Datasheet

500 MHz Twelve 2-to-1 Differential LVPECL Clock Multiplexer

No Preview Available !

PI6C485352
2.5V/3.3V, 500 MHz Twelve 2-to-1 Differential
LVPECL Clock Multiplexer
Pin Description
Pin #
Name
1, 2
3, 4
5, 6
7, 8
9, 10
11, 12
25, 26
27, 28
29, 30
31, 32
33, 34
35, 36
13, 24
37, 48
14, 23
15, 22
16, 17
18, 19
20, 21
40, 41
42, 43
44, 45
38
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
Q4, /Q4
Q5, /Q5
/Q11, Q11
/Q10, Q10
/Q9,Q9
/Q8,Q8
/Q7,Q7
/Q6,Q6
VCCO
VEE
VCC
SEL5, SEL4,
SEL3, SEL9,
SEL10, SEL11,
SEL8, SEL7,
SEL6, SEL0,
SEL1, SEL2
CLK1
39 /CLK1
46 CLK0
47 /CLK0
Pullup/
Pulldown
Pulldown
Pulldown
Pullup/
Pulldown
Pulldown
Pullup/
Pulldown
Description
Differential LVPECL Output pairs. LVPECL interface levels
Output supply pins
Ground pins
Core supply pins
Clock select inputs. LVCMOS/LVTTL interface levels
Non-inverting differential clock input
Inverting differential clock input.
Non-inverting differential clock input
Inverting differential clock input.
06-0184
2 PS8826฀฀฀฀฀฀฀฀฀฀฀07/26/06


Part Number PI6C485352
Description 500 MHz Twelve 2-to-1 Differential LVPECL Clock Multiplexer
Maker Pericom Semiconductor
PDF Download

PI6C485352 Datasheet PDF






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