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PI6CL10804 - 1:4 Networking Clock Buffer

General Description

The PI6CL10804 is a 1.2V or 1.5V high-speed, low-noise 1:4 non-inverting clock buffer.

The key goal in designing the PI6CL10804 is to target networking applications that require low-skew, low-jitter, and high-frequency clock distribution.

Key Features

  • High-speed, low-noise, non-inverting 1:4 buffer.
  • Maximum Frequency up to 200 MHz.
  • Low output skew < 100ps.
  • Low propagation delay < 3.5ns.
  • Optimized duty cycle.
  • 3.3V tolerent input.
  • 1.2V or 1.5V supply voltage.
  • Packages (Pb-free & Green available): -8-pin SOIC (W).

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Full PDF Text Transcription for PI6CL10804 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for PI6CL10804. For precise diagrams, and layout, please refer to the original PDF.

PI6CL10804 1.2V/1.5V, 200MHz, 1:4 Networking Clock Buffer Features • High-speed, low-noise, non-inverting 1:4 buffer • Maximum Frequency up to 200 MHz • Low output skew <...

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rting 1:4 buffer • Maximum Frequency up to 200 MHz • Low output skew < 100ps • Low propagation delay < 3.5ns • Optimized duty cycle • 3.3V tolerent input • 1.2V or 1.5V supply voltage • Packages (Pb-free & Green available): -8-pin SOIC (W) Description The PI6CL10804 is a 1.2V or 1.5V high-speed, low-noise 1:4 non-inverting clock buffer. The key goal in designing the PI6CL10804 is to target networking applications that require low-skew, low-jitter, and high-frequency clock distribution. Providing output-to-output skew as low as 100ps, the PI6CL10804 is an ideal clock distribution device for synchronous systems.

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