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Pericom Semiconductor Corporation

PI6C4853111 Datasheet Preview

PI6C4853111 Datasheet

2.5V/3.3V 500MHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer

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PI6C4853111
2.5V/3.3V 500MHz Low Skew 1-to-10 Differential to LVPECL
Fanout Buffer with 2 to 1 Differential Clock Input Mux
Features
• Pin-to-pin compatible to ICS853111-02
• FMAX < 500MHz
• 10 pairs of differential LVPECL outputs
• Selectable differential input pairs with single ended
input option
• Input CLK accepts: LVPECL, LVDS, CML, SSTL input
level
• Output skew: 35ps (typ)
• Operating Temperature: -40oC to 85oC
• Core Power supply: 3.3V+/-10%,
Output Power supply: 2.5V ±5% & 3.3V ±10%
• Packaging (Pb-free & Green):
— 32-pin TQFP (FA)
Description
The PI6C4853111 is a high-performance low-skew 1-to-10 LVPECL
fanout buffer. The PI6C4853111 features two selectable differential
clock inputs and translates to ten LVPECLoutputs. The CLK inputs
accept LVPECL, LVDS, CML and SSTL signals.
PI6C4853111 is ideal for clock distribution applications demanding
performance and repeatability.
Block Diagram
CLK0
/CLK0
CLK1
/CLK1
CLK_SEL
0
1
06-0052
Pin Configuration
Q0
/Q0
Q1
/Q1
Q2
/Q2
Q3 24 23 22 21 20 19 18 17
/Q3 VCCO 25
16 vCCO
Q4 /Q2 26
/Q4 Q2 27
/Q1 28
15 Q7
14 /Q7
13 Q8
Q5 Q1 29
12 /Q8
/Q5 /Q0 30
11 Q9
Q6
/Q6
Q0 31
vCCO 32
123 4 5
10 /Q9
9 vCCO
6 78
Q7
/Q7
Q8
/Q8
Q9
/Q9
1
PS8805B
04/18/06




Pericom Semiconductor Corporation

PI6C4853111 Datasheet Preview

PI6C4853111 Datasheet

2.5V/3.3V 500MHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer

No Preview Available !

PI6C4853111
2.5V/3.3V 500MHz Low Skew 1-to-10 Diwffwewre.DnattiaaSlhetoet4LUV.cPomECL
Fanout Buffer w/ 2 to 1 Differential Clock Input Mux
Pin Description(1)
Name
Pin #
Type Description
VEE
CLK_SEL
8
2
P Connect to negative power supply
I
Clock select input. When high, selects CLK1 input. When low, selects CLK0 input.
LVCMOS/LVTTL level with 50kΩ pull down.
CLK0
3
I Differential LVPECL clock input with 75kΩ pull-down
/CLK0
CLK1
4
6
I Inverting differential LVPECL clock input. Defaults to VCC/2 if left floating.
I Differential LVPECL clock input with 75kΩ pull-down
/CLK1
NC
7
5
I Inverting differential LVPECL clock input. Defaults to VCC/2 if left floating.
No Connect
VCCO
9,16, 25,32
P
Output Power pin
VCC
Q3, /Q3
Q2, /Q2
Q1, /Q1
Q0, /Q0
Q9, /Q9
Q8, /Q8
Q7, /Q7
Q6, /Q6
Q5, /Q5
Q4, /Q4
1
24,23
27,26
29,28
31,30
11,10
13,12
15,14
18,17
20,19
22,21
P Core Power Supply
O Differential output pair, LVPECL interface level.
O Differential output pair, LVPECL interface level.
O Differential output pair, LVPECL interface level.
O Differential output pair, LVPECL interface level.
O Differential output pair, LVPECL interface level.
O Differential output pair, LVPECL interface level.
O Differential output pair, LVPECL interface level.
O Differential output pair, LVPECL interface level.
O Differential output pair, LVPECL interface level.
O Differential output pair, LVPECL interface level.
Note:
1. I = Input, O = Output, P = Power supply connection.
Pin Characteristics
Symbol
Parameter
R Input Pullup/Pulldown Resistance
Conditions
Min.
Typ.
Max.
Units
50 kΩ
Control Input Function Table
Inputs
Outputs
0 CLK0
1 CLK1
06-0052
2
PS8805B
04/18/06


Part Number PI6C4853111
Description 2.5V/3.3V 500MHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer
Maker Pericom Semiconductor Corporation
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Pericom Semiconductor Corporation





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