Datasheet4U Logo Datasheet4U.com

PLL602-10 - Low Phase Noise XO

Datasheet Summary

Description

The PLL602-10 is a monolithic low jitter and low phase noise (-134dBc/Hz @ 10kHz offset) XO IC Die, with CMOS, LVDS and PECL output, for 96MHz to 400MHz output range, using a low frequency crystal.

Features

  • w 62 mil w w Low phase noise output for the 96MHz to 400MHz range (-134 dBc at 10kHz offset). Selectable CMOS, PECL and LVDS output. 12 to 25MHz crystal input. Output Enable selector. 3.3V operation. Available in DIE (65 mil x 62 mil). . D a ta Sh t e e 4U . m o c Preliminary PLL602-10 DIE.

📥 Download Datasheet

Datasheet preview – PLL602-10

Datasheet Details

Part number PLL602-10
Manufacturer PhaseLink
File Size 141.10 KB
Description Low Phase Noise XO
Datasheet download datasheet PLL602-10 Datasheet
Additional preview pages of the PLL602-10 datasheet.

📁 Similar Datasheet

  • PLL0210A - PHASE LOCKED LOOP (Z-Communications)
  • PLL0930A - PHASE LOCKED LOOP (Z-Communications)
  • PLL1000A - PHASE LOCKED LOOP (Z-Communications)
  • PLL102-03 - Low Skew Output Buffer (PhaseLink Corporation)
  • PLL102-04 - Low Skew Output Buffer (PhaseLink Corporation)
  • PLL102-05 - Low Skew Output Buffer (PhaseLink Corporation)
  • PLL102-10 - Low Skew Output Buffer (PhaseLink Corporation)
  • PLL102-108 - Programmable DDR Zero Delay Clock Driver (PhaseLink Corporation)
  • PLL102-109 - Programmable DDR Zero Delay Clock Driver (PhaseLink Corporation)
  • PLL102-15 - Low Skew Output Buffer (PhaseLink Corporation)
Other Datasheets by PhaseLink

Full PDF Text Transcription

Click to expand full text
96MHz – 400MHz Low Phase Noise XO (for 12 – 25MHz Crystals) FEATURES • • • • • • w 62 mil w w Low phase noise output for the 96MHz to 400MHz range (-134 dBc at 10kHz offset). Selectable CMOS, PECL and LVDS output. 12 to 25MHz crystal input. Output Enable selector. 3.3V operation. Available in DIE (65 mil x 62 mil). .D a ta Sh t e e 4U . m o c Preliminary PLL602-10 DIE CONFIGURATION 65 mil (1550,1475) 19 18 17 16 25 26 24 23 22 21 20 27 15 28 14 29 30 DESCRIPTIONS 31 The PLL602-10 is a monolithic low jitter and low phase noise (-134dBc/Hz @ 10kHz offset) XO IC Die, with CMOS, LVDS and PECL output, for 96MHz to 400MHz output range, using a low frequency crystal.
Published: |