74HC9115 Datasheet | Philips Semiconductors

FEATURES - Schmitt trigger action on all data inputs - Output capability: standard (open drain) - ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT9115 are high-speed Si-gate CMOS devices and are pin patible with low power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard no. 7A. The 74HC/HCT9115 are nine wide Schmitt trigger buffer with open drain outputs and Schmitt trigger inputs. 74HC/HCT9115 The Schmitt trigger action in the data inputs transform slowly changing input signals into sharply defined jitter-free output signals. The 74HC/HCT9115 have open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e. when one input is HIGH, the output may be pulled to any voltage between GND and VOmax. This allows the device to be used as a LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation and OR-tied output applications, these devices must have a pull-up resistor to establish a logic HIGH level. The “9115” is identical to the “9114” but has non-inverting outputs. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL t PHL/ t PLZ CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in p F VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PARAMETER propagation delay An to Yn input capacitance power dissipation capacitance per buffer notes 1 and 2 CONDITIONS HC CL = 15 p F; VCC = 5 V 12 3.5 5 HCT 13 3.5 5 ns p F p F UNIT December 1990 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer; open drain outputs PIN DESCRIPTION PIN NO. 1, 2, 3, 4, 5, 6, 7, 8, 9 10 19, 18, 17, 16, 15, 14, 13, 12, 11 20 SYMBOL A0 to...