74LVC109 flip-flop equivalent, dual jk flip-flop.
* Wide supply voltage range of 1.2 to 3.6 V
* In accordance with JEDEC standard no. 8-1A.
* Inputs accept voltages up to 5.5 V
* CMOS low power consumpti.
DC input voltage range DC output voltage range Operating free-air temperature range Input rise and fall times VCC = 1.2.
The 74LVC109 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT109. The 74LVC109 is a dual positive-edge triggered JK-type flip-flop featuring individual J, K inputs, clock (CP) inputs, set (SD) and reset (RD) inpu.
Image gallery
TAGS
Manufacturer
Related datasheet
Download (Size : 103.17KB)