HEF4557B
DESCRIPTION
The HEF4557B is a static clocked serial shift register whose length may be programmed to be any number of bits between 1 and 64. The number of bits selected is equal to the sum of the subscripts of the enabled length control inputs (L1, L2, L4, L8, L16 and L32) plus one. Serial data may be selected from the DA or DB data inputs with the A/B select input. This feature is useful for recirculation purposes. Information on DA or DB is shifted into the first register position and all the data in the register is shifted one position to the right on the LOW to HIGH transition of
CP0 while CP1 is LOW or on the HIGH to LOW transition of CP1 while CP0 is HIGH. A HIGH on master reset (MR) resets the register and forces O to LOW and O to HIGH, independent of the other inputs.
PINNING
DA, DB A/B CP0 CP1 MR L1 to L32 O, O
Fig.1 Functional diagram. data inputs select data input clock input clock enable input asynchronous master reset bit-length control inputs buffered outputs
HEF4557...
