Digital Still Camera Processor (ImagIC family)
s Interface to ROM, DRAM, SRAM, ﬂash and PC Card [Compact Flash and SSFDC
s Integrated general purpose peripheral units like a UART, timers, an I2C-bus
transceiver, ADC converters, RTC and I/O ports
s Includes USB and RS-232C communication interfaces.
2.2 External interfaces
s Two UART (RS-232) data ports with DMA capabilities (≤187.5 kbit/s) including
hardware ﬂow control RxD, TxD, RTS, CTS for modem support
s 32 general purpose, bidirectional I/O interface pins, the ﬁrst 8 bits may also be
used as interrupt inputs
s Two PWM outputs (8-bit resolution).
2.3 CPU related features
s 32-bit PR3001 core
s 1-kbyte data cache and 4-kbyte instruction cache
s Programmable low-power mode, including wake-up on interrupt
s Memory management unit [Translation Lookaside Buffer (TLB)]
s Two built in 24-bit general purpose timers and one 24-bit watchdog timer
s Real-time clock unit (active in sleep mode)
s On-chip 8-kbyte SRAM for storing code which needs fast execution
s Platform software based on real-time pSOS (plug-in Silicon Operating System).
2.4 DSP features
s Advanced colour reconstruction
s Programmable digital ﬁlters for noise reduction and contour enhancement
s 16 programmable measurement windows allowing to perform the measurements
necessary for exposure, white balance and focus adjustment in a DSC system;
available measurement outputs for exposure, white balance and focus control.
2.5 Pulse pattern generator features
s Programmable through dedicated PC-software, allowing to drive all CCDs
currently present in the market, as well as CDS/AGC/ADC chips: up to
8 × 8 kpixels.
s Fully ISO10918 compliant
s Supports Tiff, Exif 2.1, DCF & DPOF
s Quick compression (4 images/s for a 1.3 Mpixels resolution).
2.7 USB interface
s Fully compatible with USB.
9397 750 07048
Rev. 01 — 20 April 2000
© Philips Electronics N.V. 2000. All rights reserved.
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