HYS72T64301HP-3.7-A modules equivalent, 240-pin registered ddr2 sdram modules.
* Programmable CAS Latencies (3, 4 and 5), Burst Length (4 & 8) and Burst Type
* Auto Refresh (CBR) and Self Refresh
* Average Refresh Period 7.8 µs at a TCAS.
* One rank 64M × 72 module organization and 64M × 4 chip organization
* 512 MByte module built with 256-Mbit DD.
capacitive loading to the system bus, but adds one cycle to the SDRAM timing. Decoupling capacitors are mounted on the PCB board. The DIMMs feature serial presence detect based on a serial E2PROM device using the 2-pin I2C protocol. The first 128 byt.
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