HYS72T256520HFD-3S-B Datasheet | Qimonda AG

February 2007 Cover Page HYS72T64[4/5]00HFD- 3S- B HYS72T128[4/5]20HFD- 3S- B HYS72T256[4/5]20HFD- 3S- B .. 240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM Ro HS pliant Products Internet Data Sheet Rev. 1.2 Internet Data Sheet HYS72T[64/128/256][4/5][00/20]HFD- 3S- B Revision History Revision History: 2007-02-09, Rev. 1.2 All Page 4 Page 20 Adapted internet edition Updated “Ordering Information (Pb-free ponents and assembly)” on Page 4 Updated “Current Spec. and Conditions” on Page 20 Previous Revision: 2006-08-18, Rev. 1.1 .. We Listen to Your ments We Listen to Your ments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: techdoc@qimonda. qag_techdoc_rev400 / 3.2 QAG / 2006-07-21 09142006-Q5TN-B9NE Internet Data Sheet HYS72T[64/128/256][4/5][00/20]HFD- 3S- B .. Overview Features - Detects errors on the channel and reports them to the host memory controller. - Automatic DDR2 DRAM Bus Calibration. - Automatic Channel Calibration. - Full Host Control of the DDR2 DRAMs. - Over-Temperature Detection and Alert. - Hot Add-on and Hot Remove Capability. - MBIST and IBIST Test Functions. - Transparent Mode for DRAM Test Support. - Low profile: 133.35mm x 30.35 mm - 240 Pin gold plated card connector with 1.00 mm contact centers (JEDEC standard pending). - Based on JEDEC standard reference card designs (Jedec standard pending). - SPD (Serial Presence Detect) with 256 Byte serial E2PROM.Performance:...