LVDS Interface ICs
27bit LVDS Transmitter
BU90T81
●General Description
The BU90T81 transmitter operates from 20MHz to
112MHz wide clock range, and 27bits data of parallel
LVCMOS level inputs(R/G/B24bits and VSYNC,HSYNC,DE)
are converted to four channels of LVDS data stream. Data is
transmitted seven times (7X) stream and reduce cable
number by 3(1/3) or less.
The BU90T81 operates from a single 1.8V supply for low
power. And the BU90T81 has low swing mode to be able to
expect further low power and low EMI .
●Features
▆24bits data of parallel LVCMOS level inputs are
converted to four channels of LVDS data stream.
▆Support clock frequency from 20MHz up to 112MHz.
▆Low power 1.8V CMOS design
▆Power down mode
▆Clock edge selectable
▆Support 6bit/8bit mode selectable
▆Support reduced swing LVDS for low EMI.
▆Support LVDS Outputs pin reverse function
▆Support spread spectrum clock generator input
●Key Specifications
▆Supply Voltage range
▆Operating frequency
▆Operating Temperature Range
▆Power Consumption
1.65 to 1.95 V
20 to 112MHz
–20 to 85℃
50mW(Typ)
●Packages
VBGA048W040
●Applications
▆Tablet
▆Netbook PC
▆Digital Picture Frame
4.00 ㎜×4.00 ㎜×0.90 ㎜
●Block Diagram
LVCMOS Input
CLKIIN
(20-112MHz)
LVDS Output
PLL
TCLK +/-
(20-112MHz)
R[7:0]
G[7:0]
B[7:0]
8
8
8
Parallel to Serial
HSYNC
VSYNC
DE
FLIP
6B8B
RS[1:0]
RF
XRST
TA +/-
TB +/-
TC +/-
TD +/-
Figure-1 Block Diagram
○Product structure：Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays
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TSZ22111・14・001
1/11
TSZ02201-0L2L0V100010-1-2
23.JAN.2012 Rev.001
