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Rohm Semiconductor Electronic Components Datasheet

BU90T81 Datasheet

27bit LVDS Transmitter

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LVDS Interface ICs
27bit LVDS Transmitter
BU90T81
General Description
The BU90T81 transmitter operates from 20MHz to
112MHz wide clock range, and 27bits data of parallel
LVCMOS level inputs(R/G/B24bits and VSYNC,HSYNC,DE)
are converted to four channels of LVDS data stream. Data is
transmitted seven times (7X) stream and reduce cable
number by 3(1/3) or less.
The BU90T81 operates from a single 1.8V supply for low
power. And the BU90T81 has low swing mode to be able to
expect further low power and low EMI .
Features
24bits data of parallel LVCMOS level inputs are
converted to four channels of LVDS data stream.
Support clock frequency from 20MHz up to 112MHz.
Low power 1.8V CMOS design
Power down mode
Clock edge selectable
Support 6bit/8bit mode selectable
Support reduced swing LVDS for low EMI.
Support LVDS Outputs pin reverse function
Support spread spectrum clock generator input
Key Specifications
Supply Voltage range
Operating frequency
Operating Temperature Range
Power Consumption
1.65 to 1.95 V
20 to 112MHz
–20 to 85
50mW(Typ)
Packages
VBGA048W040
Applications
Tablet
Netbook PC
Digital Picture Frame
4.00 ㎜×4.00 ㎜×0.90
Block Diagram
LVCMOS Input
CLKIIN
(20-112MHz)
LVDS Output
PLL
TCLK +/-
(20-112MHz)
R[7:0]
G[7:0]
B[7:0]
8
8
8
Parallel to Serial
HSYNC
VSYNC
DE
FLIP
6B8B
RS[1:0]
RF
XRST
TA +/-
TB +/-
TC +/-
TD +/-
Figure-1 Block Diagram
Product structureSilicon monolithic integrated circuit This product is not designed protection against radioactive rays
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
1/11
TSZ02201-0L2L0V100010-1-2
23.JAN.2012 Rev.001


Rohm Semiconductor Electronic Components Datasheet

BU90T81 Datasheet

27bit LVDS Transmitter

No Preview Available !

BU90T81
Datasheet
Pin Configuration
Top view
1234567
A G[5] G[7] R[1] R[3] R[5] R[6] R[7]
B - G[6] R[0] R[2] R[4] TA- TA+
C G[3] G[4] GND RS[1] RS[0] TB- TB+
D G[1] G[2] RF VDD VDD TC- TC+
E G[0] B[7] FLIP 6B8B GND TCLK- TCLK+
F B[6] B[5] B[2] B[0] DE TD- TD+
G B[4] B[3] B[1] HSYNC VSYNC CLKIN XRST
48pin VBGA
Figure-2 Pin Diagram (Top View)
Pin Description
Pin Name
TA+/-, TB+/-,
TC+/-,TD+/-
TCLK+/-
R[7:0]
G[7:0]
B[7:0]
HSYNC,VSYNC,
DE
CLKIN
Pin No.
B7,B6,C7,C6,D7,D6,F7,F6
E7,6
A7,A6,A5,B5,A4,B4,A3,B3
A2,B2,A1,C2,C1,D2,D1,E1
E2,F1,F2,G1,G2,F3,G3,F4
G4,G5,F5
G6
XRST
G7
RF D3
RS[1:0]
C3,C5
6B8B
FLIP
VDD
GND
E4
E3
D4,D5
C3,E5
Type
LVDS
OUT
CMOS
IN
CMOS
IN
POWER
GND
Descriptions
LVDS Data out
LVDS Clock out
Pixel and control data inputs
Clock input
Power Down
HNormal operation
LPower down ( all LVDS output signal are Hi-z)
Input CLK Triggering Edge Select.
HRising edge
LFalling edge
LVDS swing mode select
RS1 RS0 LVDS swing
L L TYP=160V
L H TYP=200V
H L TYP=350V
H H Reserved
6bit/8bit mode select
H : 6bit mode(FLIP=L TD+/- is Hiz)
(FLIP=H TA+/- is Hiz)
L : 8bit mode
LVDS output pin reverse select.
H : Reverse
L : Normal
1.8V Power supply
Ground Pins
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
2/11
TSZ02201-0L2L0V100010-1-2
23.JAN.2012 Rev.001


Part Number BU90T81
Description 27bit LVDS Transmitter
Maker ROHM
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BU90T81 Datasheet PDF






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