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Ramtron

FM25C160C Datasheet Preview

FM25C160C Datasheet

5V F-RAM Memory

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www.DataSheet.co.kr
Preliminary
FM25C160C
16Kb Serial 5V F-RAM Memory
Features
16K bit Ferroelectric Nonvolatile RAM
Organized as 2,048 x 8 bits
High Endurance 1 Trillion (1012) Read/Writes
36 year Data Retention at +75C
NoDelay™ Writes
Advanced High-Reliability Ferroelectric Process
Very Fast Serial Peripheral Interface - SPI
Up to 20 MHz maximum Bus Frequency
Direct hardware replacement for EEPROM
SPI Mode 0 & 3 (CPOL, CPHA=0,0 & 1,1)
Description
The FM25C160C is a 16-kilobit nonvolatile memory
employing an advanced ferroelectric process. A
ferroelectric random access memory or F-RAM is
nonvolatile but operates in other respects as a RAM.
It provides reliable data retention for 36 years while
eliminating the complexities, overhead, and system
level reliability problems caused by EEPROM and
other nonvolatile memories.
The FM25C160C performs write operations at bus
speed. No write delays are incurred. Data is written to
the memory array immediately after it has been
successfully transferred to the device. The next bus
cycle may commence immediately without the need
for data polling. The FM25C160C is capable of
supporting up to 1012 read/write cycles, or a million
times more write cycles than EEPROM.
These capabilities make the FM25C160C ideal for
nonvolatile memory applications requiring frequent
or rapid writes. Examples range from data collection,
where the number of write cycles may be critical, to
demanding industrial controls where the long write
time of EEPROM can cause data loss.
The FM25C160C provides substantial benefits to
users of serial EEPROM, in a hardware drop-in
replacement. The FM25C160C uses the high-speed
SPI bus, which enhances the high-speed write
capability of F-RAM technology. The specifications
are guaranteed over an industrial temperature range
of -40°C to +85°C.
Sophisticated Write Protection Scheme
Hardware Protection
Software Protection
Low Power Consumption
250 A Active Current (1 MHz)
4 A (typ.) Standby Current
Industry Standard Configuration
Industrial Temperature -40C to +85C
8-pin “Green”/RoHS SOIC (-G)
Pin Configuration
CS
SO
WP
VSS
1
2
3
4
8 VDD
7 HOLD
6 SCK
5 SI
Pin Name
/CS
/WP
/HOLD
SCK
SI
SO
VDD
VSS
Function
Chip Select
Write Protect
Hold
Serial Clock
Serial Data Input
Serial Data Output
5V
Ground
Ordering Information
FM25C160C-G
“Green” 8-pin SOIC
FM25C160C-GTR “Green” 8-pin SOIC,
Tape & Reel
This is a product that has fixed target specifications but are subject
to change pending characterization results.
Rev. 1.1
July 2011
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-F-RAM, (719) 481-7000
www.ramtron.com
Page 1 of 13
Datasheet pdf - http://www.DataSheet4U.net/




Ramtron

FM25C160C Datasheet Preview

FM25C160C Datasheet

5V F-RAM Memory

No Preview Available !

www.DataSheet.co.kr
FM25C160C - 16Kb 5V SPI F-RAM
WP
CS
HOLD
SCK
SI
Instruction Decode
Clock Generator
Control Logic
Write Protect
Instruction Register
Address Register
Counter
11
256 x 64
FRAM Array
8
Data I/O Register
3
Nonvolatile Status
Register
SO
Figure 1. Block Diagram
Pin Description
Pin Name
/CS
I/O
Input
SCK Input
/HOLD
Input
/WP Input
SI Input
SO Output
VDD
VSS
Supply
Supply
Pin Description
Chip Select: This active low input activates the device. When high, the device enters
low-power standby mode, ignores other inputs, and all outputs are tri-stated. When
low, the device internally activates the SCK signal. A falling edge on /CS must occur
prior to every op-code.
Serial Clock: All I/O activity is synchronized to the serial clock. Inputs are latched on
the rising edge and outputs occur on the falling edge. Since the device is static, the
clock frequency may be any value between 0 and 20 MHz and may be interrupted at
any time.
Hold: The /HOLD pin is used when the host CPU must interrupt a memory operation
for another task. When /HOLD is low, the current operation is suspended. The device
ignores any transition on SCK or /CS. All transitions on /HOLD must occur while
SCK is low.
Write Protect: This active low pin prevents write operations to the status register. This
is critical since other write protection features are controlled through the status
register. A complete explanation of write protection is provided on page 6. *Note that
the function of /WP is different from the FM25160.
Serial Input: All data is input to the device on this pin. The pin is sampled on the rising
edge of SCK and is ignored at other times. It should always be driven to a valid logic
level to meet IDD specifications.
* SI may be connected to SO for a single pin data interface.
Serial Output. SO is the data output pin. It is driven actively during a read and remains
tri-state at all other times including when /HOLD is low. Data transitions are driven on
the falling edge of the serial clock.
* SO may be connected to SI for a single pin data interface.
Supply Voltage. 5V
Ground
Rev. 1.1
July 2011
Page 2 of 13
Datasheet pdf - http://www.DataSheet4U.net/


Part Number FM25C160C
Description 5V F-RAM Memory
Maker Ramtron
PDF Download

FM25C160C Datasheet PDF






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