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Ramtron

FM25L04B Datasheet Preview

FM25L04B Datasheet

3V F-RAM Memory

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www.DataSheet.co.kr
Preliminary
FM25L04B
4Kb Serial 3V F-RAM Memory
Features
4K bit Ferroelectric Nonvolatile RAM
Organized as 512 x 8 bits
High Endurance 100 Trillion (1014) Read/Writes
38 Year Data Retention (@ +75ºC)
NoDelay™ Writes
Advanced High-Reliability Ferroelectric Process
Very Fast Serial Peripheral Interface - SPI
Up to 20 MHz Frequency
Direct Hardware Replacement for EEPROM
SPI Mode 0 & 3 (CPOL, CPHA=0,0 & 1,1)
Sophisticated Write Protection Scheme
Hardware Protection
Software Protection
Low Power Consumption
Low Voltage Operation 2.7-3.6V
200 µA Active Current (1 MHz)
3 µA (typ.) Standby Current
Industry Standard Configuration
Industrial Temperature -40°C to +85°C
8-pin “Green”/RoHS SOIC and TDFN Packages
Description
The FM25L04B is a 4-kilobit nonvolatile memory
employing an advanced ferroelectric process. A
ferroelectric random access memory or F-RAM is
nonvolatile and performs reads and writes like a
RAM. It provides reliable data retention for 38 years
while eliminating the complexities, overhead, and
system level reliability problems caused by
EEPROM and other nonvolatile memories.
The FM25L04B performs write operations at bus
speed. No write delays are incurred. Data is written to
the memory array immediately after each byte has
been transferred to the device. The next bus cycle
may commence without the need for data polling.
The FM25L04B is capable of supporting 1014
read/write cycles, or a million times more write
cycles than EEPROM.
These capabilities make the FM25L04B ideal for
nonvolatile memory applications requiring frequent
or rapid writes or low power operation. Examples
range from data collection, where the number of
write cycles may be critical, to demanding industrial
controls where the long write time of EEPROM can
cause data loss.
The FM25L04B provides substantial benefits to users
of serial EEPROM as a hardware drop-in
replacement. The FM25L04B uses the high-speed
SPI bus, which enhances the high-speed write
capability of F-RAM technology. Device
specifications are guaranteed over an industrial
temperature range of -40°C to +85°C.
This is a product that has fixed target specifications but are subject
to change pending characterization results.
Rev. 1.3
Feb. 2011
Pin Configuration
CS
SO
WP
VSS
1
2
3
4
8 VDD
7 HOLD
6 SCK
5 SI
Top View
/CS 1
SO 2
/WP 3
VSS 4
8 VDD
7 /HOLD
6 SCK
5 SI
Pin Name
/CS
/WP
/HOLD
SCK
SI
SO
VDD
VSS
Function
Chip Select
Write Protect
Hold
Serial Clock
Serial Data Input
Serial Data Output
Supply Voltage
Ground
Ordering Information
FM25L04B-G
“Green”/RoHS 8-pin SOIC
FM25L04B-GTR “Green”/RoHS 8-pin SOIC,
Tape & Reel
FM25L04B-DG
“Green”/RoHS 8-pin TDFN
FM25L04B-DGTR “Green”/RoHS 8-pin TDFN,
Tape & Reel
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-F-RAM, (719) 481-7000
www.ramtron.com
Page 1 of 14
Datasheet pdf - http://www.DataSheet4U.net/




Ramtron

FM25L04B Datasheet Preview

FM25L04B Datasheet

3V F-RAM Memory

No Preview Available !

www.DataSheet.co.kr
FM25L04B - 4Kb 3V SPI F-RAM
WP
CS
HOLD
SCK
SI
Instruction Decode
Clock Generator
Control Logic
Write Protect
Instruction Register
Address Register
Counter
9
64 x 64
FRAM Array
8
Data I/O Register
3
Nonvolatile Status
Register
SO
Figure 1. Block Diagram
Pin Descriptions
Pin Name
/CS
I/O
Input
SCK Input
/HOLD
Input
/WP Input
SI Input
SO Output
VDD
VSS
Supply
Supply
Description
Chip Select: This active low input activates the device. When high, the device enters
low-power standby mode, ignores other inputs, and all outputs are tri-stated. When
low, the device internally activates the SCK signal. A falling edge on /CS must occur
prior to every op-code.
Serial Clock: All I/O activity is synchronized to the serial clock. Inputs are latched on
the rising edge and outputs occur on the falling edge. Since the device is static, the
clock frequency may be any value between 0 and 20 MHz and may be interrupted at
any time.
Hold: The /HOLD pin is used when the host CPU must interrupt a memory operation
for another task. When /HOLD is low, the current operation is suspended. The device
ignores any transition on SCK or /CS. All transitions on /HOLD must occur while
SCK is low.
Write Protect: This active low pin prevents write operations to the memory array or
the status register. A complete explanation of write protection is provided below.
Serial Input: All data is input to the device on this pin. The pin is sampled on the
rising edge of SCK and is ignored at other times. It should always be driven to a valid
logic level to meet IDD specifications.
* SI may be connected to SO for a single pin data interface.
Serial Output: This is the data output pin. It is driven during a read and remains tri-
stated at all other times including when /HOLD is low. Data transitions are driven on
the falling edge of the serial clock.
* SO may be connected to SI for a single pin data interface.
Power Supply (2.7V to 3.6V)
Ground
Rev. 1.3
Feb. 2011
Page 2 of 14
Datasheet pdf - http://www.DataSheet4U.net/


Part Number FM25L04B
Description 3V F-RAM Memory
Maker Ramtron
PDF Download

FM25L04B Datasheet PDF






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