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Ramtron International

FM25040A Datasheet Preview

FM25040A Datasheet

4Kb FRAM Serial Memory

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FM25040A
4Kb FRAM Serial Memory
Features
4K bit Ferroelectric Nonvolatile RAM
Organized as 512 x 8 bits
High Endurance 1 Trillion (1012) Read/Writes
45 year Data Retention
NoDelay™ Writes
Advanced High-Reliability Ferroelectric Process
Very Fast Serial Peripheral Interface - SPI
Up to 20 MHz maximum Bus Frequency
Direct hardware replacement for EEPROM
SPI Mode 0 & 3 (CPOL, CPHA=0,0 & 1,1)
Description
The FM25040A is a 4-kilobit nonvolatile memory
employing an advanced ferroelectric process. A
ferroelectric random access memory or FRAM is
nonvolatile but operates in other respects as a RAM.
It provides reliable data retention for 45 years while
eliminating the complexities, overhead, and system
level reliability problems caused by EEPROM and
other nonvolatile memories.
Unlike serial EEPROMs, the FM25040A performs
write operations at bus speed. No write delays are
incurred. Data is written to the memory array in the
cycle after it has been successfully transferred to the
device. The next bus cycle may commence
immediately without the need for data polling. In
addition the product offers substantial write
endurance compared with other nonvolatile
memories. The FM25040A is capable of supporting
up to 1012 read/write cycles -- far more than most
systems will require from a serial memory.
These capabilities make the FM25040A ideal for
nonvolatile memory applications requiring frequent
or rapid writes. Examples range from data collection,
where the number of write cycles may be critical, to
demanding industrial controls where the long write
time of EEPROM can cause data loss.
The FM25040A provides substantial benefits to users
of serial EEPROM, in a hardware drop-in
replacement. The FM25040A uses the high-speed
SPI bus which enhances the high-speed write
capability of FRAM technology. Device
specifications are guaranteed over an industrial
temperature range of -40°C to +85°C.
This product conforms to specifications per the terms of the Ramtron
standard warranty. The product has completed Ramtron’s internal
qualification testing and has reached production status.
Rev. 3.0
May 2006
Sophisticated Write Protection Scheme
Hardware Protection
Software Protection
Low Power Consumption
10 µA Standby Current
Industry Standard Configuration
Industrial Temperature -40° C to +85° C
8-pin SOIC (-S)
“Green” 8-pin SOIC (-G)
Pin Configuration
CS
SO
WP
VSS
1
2
3
4
8 VDD
7 HOLD
6 SCK
5 SI
Pin Names
/CS
/WP
/HOLD
SCK
SI
SO
VDD
VSS
Function
Chip Select
Write Protect
Hold
Serial Clock
Serial Data Input
Serial Data Output
Supply Voltage 5V
Ground
Ordering Information
FM25040A-S 8-pin SOIC
FM25040A-G “Green” 8-pin SOIC
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-FRAM, (719) 481-7000
www.ramtron.com
Page 1 of 13




Ramtron International

FM25040A Datasheet Preview

FM25040A Datasheet

4Kb FRAM Serial Memory

No Preview Available !

wwwwww.Da.DtaSahteaeSt4Uh.ecoemt4U.com
FM25040A
WP
CS
HOLD
SCK
Instruction Decode
Clock Generator
Control Logic
Write Protect
Instruction Register
128 x 32
FRAM Array
Address Register
Counter
9
8
SI
Data I/O Register
SO
2
Nonvolatile Status
Register
Figure 1. Block Diagram
Pin Descriptions
Pin Name
/CS
I/O
Input
SCK
/HOLD
/WP
Input
Input
Input
SI Input
SO Output
VDD
VSS
Supply
Supply
Description
Chip Select. This active-low input activates the device. When high, the device enters low-
power standby mode, ignores other inputs, and all outputs are tri-stated. When low, the
device internally activates the SCK signal. A falling edge on /CS must occur prior to every
op-code.
Serial Clock: All I/O activity is synchronized to the serial clock. Inputs are latched on the
rising edge and outputs occur on the falling edge. Since the device is static, the clock
frequency may be any value between 0 and 20 MHz and may be interrupted at any time.
Hold: The /HOLD pin is used when the host CPU must interrupt a memory operation for
another task. When /HOLD is low, the current operation is suspended. The device ignores
any transition on SCK or /CS. All transitions on /HOLD must occur while SCK is low.
Write Protect: This active-low pin prevents all write operations, including those to the
status register. If high, write access is determined by the other write protection features, as
controlled through the status register. A complete explanation of write protection is
provided on page 6.
Serial Input: All input data is driven to this pin. The pin is sampled on the rising edge of
SCK and is ignored at other times. It should always be driven to a valid logic level to meet
IDD specifications.
* SI may be connected to SO for a single pin data interface.
Serial Output: SO is the data output pin. It is driven actively during a read and remains tri-
state at all other times including when /HOLD is low. Data transitions are driven on the
falling edge of the serial clock.
* SO can be connected to SI for a single pin data interface since the part communicates in
half-duplex fashion.
Supply Voltage: 5V
Ground
Rev. 3.0
May 2006
Page 2 of 13


Part Number FM25040A
Description 4Kb FRAM Serial Memory
Maker Ramtron International
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FM25040A Datasheet PDF






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