5P1105 - Programmable Fanout Buffer

Description

The 5P1105 is a programmable fanout buffer intended for high performance consumer, networking, industrial, computing, and data-communications applications.

Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I2C interface.

Features

Up to four high performance universal differential output pairs.
Low RMS additive phase jitter: 0.2ps.
Four banks of internal non-volatile in-system programmable or factory programmable OTP memory.
I2C serial programming interface.
One additional LVCMOS output clock.
Four universal output pairs:.
Each configurable as one differential output pair or two LVCMOS outputs.
I/O Standards:.
Single-ended I/Os: 1.8V to 3.3V.

Renesas

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Datasheet Details

Part number	5P1105
Manufacturer	Renesas
File Size	723.61 KB
Description	Programmable Fanout Buffer
Datasheet	5P1105 Datasheet
Additional preview pages of the 5P1105 datasheet.

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5P1103 - Programmable Fanout Buffer

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Programmable Fanout Buffer 5P1105 DATASHEET Description The 5P1105 is a programmable fanout buffer intended for high performance consumer, networking, industrial, computing, and data-communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I2C interface. The outputs are generated from a single reference clock. The reference clock can come from one of the two redundant clock inputs. A glitchless manual switchover function allows one of the redundant clocks to be selected during normal operation. Two select pins allow up to 4 different configurations to be programmed and accessible using processor GPIOs or bootstrapping.

Published: Jul 21, 2020 |