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650R-27ILF - NETWORKING CLOCK SOURCE

Description

The ICS650-27 is a low cost, low jitter, high performance clock synthesizer for networking applications.

Features

  • Packaged in 20-pin (150 mil) SSOP (QSOP).
  • Pb (lead) free package, RoHS compliant.
  • 12.5 MHz or 25 MHz fundamental crystal or clock input.
  • Six output clocks with selectable frequencies.
  • SDRAM frequencies of 67, 83, 100, and 133 MHz.
  • Buffered crystal reference output.
  • Zero ppm synthesis error in all clocks.
  • Ideal for PMC-Sierra’s ATM switch chips.
  • Full CMOS output swing with 25 mA output drive capability at TTL levels.

📥 Download Datasheet

Datasheet Details

Part number 650R-27ILF
Manufacturer Renesas
File Size 358.95 KB
Description NETWORKING CLOCK SOURCE
Datasheet download datasheet 650R-27ILF Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
NETWORKING CLOCK SOURCE DATASHEET ICS650-27 Description The ICS650-27 is a low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.5 MHz or 25 MHz clock or fundamental mode crystal input to produce multiple output clocks for networking chips, PCI devices, SDRAM, and ASICs. The ICS650-27 outputs all have zero ppm synthesis error. The ICS650-27 is pin compatible and functionally equivalent to the ICS650-07. It is a performance upgrade and is recommended for all new 3.3V designs. See the MK74CB214, ICS551, and ICS552-01 for non-PLL buffer devices which produce multiple low-skew copies of these output clocks.
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