72V36100 - 3.3 VOLT HIGH-DENSITY 36-BIT FIFO

Datasheet Summary

Description

The 72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow.

Flexible x36/x18/x9 Bus-Matching on both read and write por

Features

Choose among the following memory organizations: 72V36100 ⎯ 65,536 x 36 72V36110 ⎯ 131,072 x 36.
Higher density, 2Meg and 4Meg SuperSync II FIFOs.
Up to 166 MHz Operation of the Clocks.
UserselectableAsynchronousreadand/orwriteports(PBGA&CABGA Only).
User selectable input and output port bus-sizing - x36 in to x36 out - x36 in to x18 out - x36 in to x9 out - x18 in to x36 out - x9 in to x36 out.
Big-Endian/Little-Endian user selectable byte.

Renesas

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Datasheet Details

Part number	72V36100
Manufacturer	Renesas
File Size	709.40 KB
Description	3.3 VOLT HIGH-DENSITY 36-BIT FIFO
Datasheet	72V36100 Datasheet
Additional preview pages of the 72V36100 datasheet.

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Published: Sep 9, 2023 |