821024 Datasheet | Renesas

QUAD NON-PROGRAMMABLE PCM CODEC Features - 4 channel CODEC with on-chip digital filters - Selectable A-law or μ-law panding - Master clock frequency selection: 2.048 MHz, 4.096 MHz or 8.192 MHz - Internal timing automatically adjusted based on MCLK and frame sync signal - Separate PCM and master clocks - Single PCM port with up to 8.192 MHz data rate (128 time slots) - Transhybrid balance impedance hardware adjustable via external ponents - Transmit gains hardware adjustable via external ponents - Low power +5.0 V CMOS technology - +5.0 V single power supply - Package available: 32 pin PLCC, 44 pin TQFP DESCRIPTION The IDT821024 is a single-chip, four channel PCM CODEC with on- chip filters. The device provides analog-to-digital and digital-to-analog conversions and supports both a-law and μ- law panding. The digital filters in IDT821024 provides the necessary transmit and receive filtering for voice telephone circuit to interface with time-division multiplexed systems. All of the digital filters are performed in digital signal processors operating from an internal clock, which is derived from MCLK. The fixed filters set the transmit and receive gain and frequency response. In the IDT821024 the PCM data is transmitted to and received from the PCM highway in time slots determined by the individual Frame Sync signals (LFo Sn Rg naanndd SFh So Xrtn,Fwrahmeree Sny=nc1-m4)oadtersataerse from 256 KHz to available in the 8.192 MHz. IDT821024. Both The IDT821024 can be used in digital telemunication applications such as PBX, Central Office Switch, Digital Telephone and Integrated Voice/Data Access Unit. FUNCTIONAL BLOCK DIAGRAM 821024 REVISION A JUNE 25, 2014 1 ©2014 Integrated Device Technology, Inc. 821024 DATA SHEET PIN...