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82P33831 Datasheet Synchronization Management

Manufacturer: Renesas

Overview

Synchronization Management Unit for IEEE 1588 and 10G/40G/100G Synchronous Ethernet 82P33831 Datasheet HIGHLIGHTS • Synchronization Management Unit (SMU) provides tools to manage physical layer and packet based synchronous clocks for IEEE 1588 / PTP Telecom Profile applications • Supports independent IEEE 1588 and Synchronous Ethernet (SyncE) timing paths • Combo mode provides SyncE physical layer frequency support for IEEE 1588 Telecom Boundary Clocks (T-BC) and Telecom Time Slave Clocks (T-TSC) per G.8273.2 • Digital PLL 1 (DPLL1) and DPLL 2 can be configured as Digitally Controlled Oscillators (DCOs) for PTP clock synthesis • DCO frequency resolution is [(77760 / 1638400) * 2^-48] or ~1.686305041e-10 ppm • DPLL1 and DPLL2 generate G.8262 compliant SyncE clocks • Two independent Time of Day (ToD) counters/time accumulators, one associated with each of DPLL1 and DPLL2, can be used to track differences between the two time domains and to time-stamp external events • DPLL3 performs rate conversions to frequency synchronization interfaces or for other general purpose timing applications • APLL3 is Voltage Controlled Crystal Oscillator (VCXO) based and generates clocks with jitter <0.

Key Features

  • Composite clock inputs (IN1 and IN2) accept 64 kHz synchronization interface signals per ITU-T G.703.
  • Differential reference inputs (IN3 to IN8) accept clock frequencies between 1 PPS and 650 MHz.
  • Single ended inputs (IN9 to IN14) accept reference clock frequencies between 1 PPS and 162.5 MHz.
  • Loss of Signal (LOS) pins (LOS0 to LOS3) can be assigned to any clock reference input.
  • Reference monitors qualify/disqualify references depending on activity,.