Datasheet4U Logo Datasheet4U.com

843S06 - PLL Clock Synthesizer

General Description

The 843S06 is a low voltage, low skew 3.3V LVPECL Clock Synthesizer.

The device targets clock distribution in SDH/SONET telecommunication systems but is well suited for a wide range of applications requiring high performance high-speed clock synthesis.

Key Features

  • Six differential 3.3V LVPECL outputs 1,244.16/622.08MHz; 1,244.16/622.08MHz 622.08/311.04MHz; 311.04/155.52MHz 155.52/77.76MHz; 77.76/38.88MHz.
  • Three selectable differential reference clock inputs Clock frequency range: 19MHz to 622MHz.
  • REF_CLKx, nREF_CLKx pairs can accept the following differential input level: LVPECL.
  • Intrinsic jitter: 0.017mUI @ 622MHz RMS.
  • Output skew: 200ps (maximum).
  • Optional external VCXO possible.

📥 Download Datasheet

Datasheet Details

Part number 843S06
Manufacturer Renesas
File Size 474.30 KB
Description PLL Clock Synthesizer
Datasheet download datasheet 843S06 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
843S1333D Crystal-to-3.3V LVPECL Clock Synthesizer IDT
843246I Crystal-to-3.3V LVPECL Frequency Synthesizer W/Integrated Fanout Buffer IDT
843252AGLF ICS843252AGLF Integrated Circuit System
84330C Crystal-to-3.3V Differential LVPECL Frequency IDT
84330CI Crystal-to-LVPECL Frequency Synthesizer IDT

Other Datasheets by Renesas

Part Number Description
843S1066D Crystal-to-3.3V LVPECL Frequency Synthesizer
843S1333D Crystal-to-3.3V LVPECL Clock Synthesizer
8432I-101 Differential-to-3.3V LVPECL Frequency Synthesizer
8432I-51 Crystal-to-3.3V Differential LVPECL Frequency Synthesizer
84330-02 Crystal-to-3.3V Differential LVPECL Frequency Synthesizer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Low Voltage, Low Skew, 1.244GHz PLL Clock Synthesizer 843S06 DATA SHEET GENERAL DESCRIPTION The 843S06 is a low voltage, low skew 3.3V LVPECL Clock Synthesizer. The device targets clock distribution in SDH/SONET telecommunication systems but is well suited for a wide range of applications requiring high performance high-speed clock synthesis. The device implements a fully integrated multiplying PLL including: • An on-chip analog voltage controlled oscillator (VCO) • Phase-frequency detector • Programmable frequency dividers (prescalers) The loop filter is external in order to optimize the PLL for different applications. As an option, the 843S06 may be operated with an external voltage controlled crystal oscillator for applications demanding a high-Q oscillator.