87332I-01 Datasheet | Renesas

÷2, Differential-to-2.5V/3.3V ECL/LVPECL Clock Generator DATA SHEET GENERAL DESCRIPTION The 87332I-01 is a high performance ÷2 Differential-to-2.5V/3.3V ECL/LVPECL Clock Generator. The CLK, n CLK pair can accept most standard differential input levels The 87332I-01 is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 87332I-01 ideal for those clock distribution applications demanding well defined performance and repeatability. Features - One ÷2 differential 2.5V/3.3V LVPECL / ECL output - One CLK, n CLK input pair - CLK, n CLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL - Maximum output frequency: 500MHz - Maximum input frequency: 1GHz - Translates any single ended input signal to 3.3V LVPECL levels with resistor bias on n CLK input - Part-to-part skew: 400ps (maximum) - Propagation delay: 1.6ns (maximum) - LVPECL mode operating voltage supply range: VCC = 2.375V to 3.8V, VEE = 0V - ECL mode operating voltage supply range: VCC = 0V, VEE = -2.375V to -3.8V - -40°C to 85°C ambient operating temperature - Available in lead-free (Ro HS 6) package BLOCK DIAGRAM CLK n CLK ÷2 Q n Q PIN ASSIGNMENT MR CLK n CLK nc 1 2 3 4 8 Vcc 7Q 6 n Q 5 VEE 8-Lead SOIC 3.90mm x 4.90mm x 1.37mm package body M Package Top View 87332AMI-01 REVISION C 2/12/15 1 ©2015 Integrated Device Technology, Inc. 87332AMI-01 DATA...