894D115I-04 Datasheet (Renesas)

Part 894D115I-04
Description Clock/Data Recovery
Manufacturer Renesas
Size 402.23 KB
Renesas

894D115I-04 Overview

Description

The 894D115I-04 is a clock and data recovery circuit. The device is designed to extract the clock signal from a NRZ-coded STM-4 (OC-12/STS-12) or STM-1 (OC-3/STS-3) input data signal.

Key Features

  • Input: NRZ data (622.08 or 155.52 Mbit/s)
  • Output: clock signal (622.08MHz or 155.52MHz) and retimed data signal at 622.08 or 155.52 Mbit/s
  • Internal PLL for clock generation and clock recovery
  • Differential inputs can accept LVPECL levels
  • Differential LVDS data and clock outputs