894D115I-04 Datasheet - Renesas

Clock/Data Recovery

894D115I-04 Features

* Clock recovery for STM-4 (OC-12/STS-12) and STM-1 (OC-3/STS-3)

* Input: NRZ data (622.08 or 155.52 Mbit/s)

* Output: clock signal (622.08MHz or 155.52MHz) and retimed data signal at 622.08 or 155.52 Mbit/s

* Internal PLL for clock generation and clock recovery

894D115I-04 General Description

The 894D115I-04 is a clock and data recovery circuit. The device is designed to extract the clock signal from a NRZ-coded STM-4 (OC-12/STS-12) or STM-1 (OC-3/STS-3) input data signal. The output signals of the device are the recovered clock and retimed data signals. Input and output are differential.

894D115I-04 Datasheet (402.23 KB)