Description
The 8P791208 is a low additive jitter 2:8 buffer with CMOS/ differential outputs The device takes one or two reference clocks, selects between them using a pin selection, and generates up to eight outputs that are the same as the reference frequency.
Features
- Accepts input frequencies ranging from 1PPS (1Hz) to 700MHz.
- Two differential inputs support LVPECL, LVDS, LVHSTL,
HCSL, or LVCMOS reference clocks.
- Generates 8 differential or 16 LVCMOS outputs.
- Outputs arranged in two banks of four outputs each.
- Select pins control which input drives which of two output
banks.
- Controlled by 3-level input pins that are 3.3V tolerant for all
core voltages.
- Output type may be selected from LVPEC, LVDS or
2xLVCMOS.
- Each ban.