8S89834I Datasheet | Renesas

Low Skew, 2-to-4 LVCMOS/LVTTL-to LVPECL/ECL Clock Multiplexer Description The 8S89834I is a high speed 2-to-4 LVCMOS/LVTTL-to-LVPECL/ECL Clock Multiplexer. The 8S89834I is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The device also has an output enable pin which may be useful for system test and debug purposes. The 8S89834I is packaged in a small 3mm x 3mm 16-pin VFQFN package which makes it ideal for use in space-constrained applications. Features - Four differential LVPECL/ECL output pairs - Two LVCMOS/LVTTL clock inputs - Maximum output frequency: 1GHz - Output skew: 30ps (maximum) - Part-to-part skew: 100ps (maximum) - Propagation delay: 550ps (maximum) - Additive phase jitter, RMS: 0.12ps (typical) - Full 3.3V and 2.5V operating supply modes - -40°C to 85°C ambient operating temperature - Available in lead-free (Ro HS 6) package Block Diagram SEL Pullup IN1 Pullup 1 0 IN2 Pullup EN Pullup DQ CK Q0 n Q0 Q1 n Q1 Q2 n Q2 Q3 n Q3 Pin Assignment n Q0 Q0 VCC VEE 16 15 14 13 Q1 1 12 IN1 n Q1 2 11...