logo

8T73S208B-01 Datasheet, Renesas

8T73S208B-01 buffer equivalent, differential lvpecl clock divider and fanout buffer.

8T73S208B-01 Avg. rating / M : 1.0 rating-12

datasheet Download

8T73S208B-01 Datasheet

Features and benefits


* One differential input reference clock
* Differential pair can accept the following differential input levels: LVDS, LVPECL, CML
* Integrated input terminat.

Application

demanding well-defined performance and repeatability. The integrated input termination resistors make interfacing to the.

Image gallery

8T73S208B-01 Page 1 8T73S208B-01 Page 2 8T73S208B-01 Page 3

Since 2006. D4U Semicon.   |   Contact Us   |   Privacy Policy   |   Purchase of parts