8T73S208B-01 Overview
The 8T73S208B-01 is a high-performance differential LVPECL clock divider and fanout buffer. The device is designed for the frequency division and signal fanout of high-frequency, low phase-noise clocks. The 8T73S208B-01 is characterized to operate from a 2.5V and 3.3V power supply.
8T73S208B-01 Key Features
- One differential input reference clock
- Differential pair can accept the following differential input
- Integrated input termination resistors
- Eight LVPECL outputs
- Selectable clock frequency division of ÷1, ÷2, ÷4 and ÷8
- Maximum input clock frequency: 1GHz
- LVCMOS interface levels for the control inputs
- Individual output enable/disabled by I2C interface
- Power-up state: all outputs disabled
- Output skew: 60ps (maximum)
