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8T74S208C-01 Datasheet, Renesas

8T74S208C-01 buffer equivalent, lvds clock divider and fanout buffer.

8T74S208C-01 Avg. rating / M : 1.0 rating-11

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8T74S208C-01 Datasheet

Features and benefits

One differential input reference clock Differential pair can accept the following differential input levels: LVDS, LVPECL, CML Integrated input termination resistors Eigh.

Application

demanding well-defined performance and repeatability. The integrated input termination resistors make interfacing to the.

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