Part number:
8T74S208C-01
Manufacturer:
File Size:
634.20 KB
Description:
Lvds clock divider and fanout buffer.
8T74S208C-01 Datasheet (634.20 KB)
* One differential input reference clock Differential pair can accept the following differential input levels: LVDS, LVPECL, CML Integrated input termination resistors Eight LVDS outputs Selectable clock frequency division of ÷1, ÷2, ÷4 and ÷8 Maximum input clock frequency: 1GHz LVCMOS interface level
8T74S208C-01 Datasheet (634.20 KB)
8T74S208C-01
634.20 KB
Lvds clock divider and fanout buffer.
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