8V49NS0312 Datasheet | Renesas

Description The 8V49NS0312 is a Clock Generator with four output dividers: three integer and one that is either integer or fractional. When used with an external crystal, the 8V49NS0312 generates high-performance timing geared towards the munications and data markets, especially for applications that demand extremely low phase noise, such as 10, 40, and 100GE. The 8V49NS0312 provides versatile frequency configurations and output formats and is optimized to deliver excellent phase noise performance. The device delivers an optimum bination of high clock frequency and low phase noise performance, bined with high power supply noise rejection. The 8V49NS0312 supports two types of output levels: LVPECL or LVDS on eleven of its outputs. In addition, there is a single LVCMOS output that has the option of providing a generated clock or acting as a reference bypass output. The device can be configured to deliver specific output configurations under pin control only or additional configurations through an I2C serial interface. It is offered in a lead-free (Ro HS6) 64-VFQFPN package. Features - Eleven differential LVPECL, LVDS outputs with programmable voltage swings - One LVCMOS output - Input reference maybe bypassed to this output - The clock input operates in full differential mode (LVDS, LVPECL) or single-ended LVCMOS mode - Driven from a crystal or differential clock input - 2.4-2.5GHz PLL frequency range supports Ethernet, SONET and CPRI frequency plans - Four Integer output dividers with a range of output divide ratios (see Table 7) - One Fractional Output divider can generate any desired output frequency - Support of output power-down - Excellent clock output phase noise Offset Output Frequency Single-side Band Phase Noise 100k Hz 156.25MHz -143d Bc/Hz - Phase Noise RMS, 156.25MHz, 12k Hz to 20MHz integration range: 110fs (maximum) - Select configurations may be controlled via the use of control input pins without need for serial port access - LVCMOS patible I2C...