9DB233 Datasheet - Renesas

DIFFERENTIAL BUFFER

9DB233 Features

* 2 - 0.7V current mode differential HCSL output pairs Features/Benefits

* OE# pins; suitable for Express Card applications

* PLL or bypass mode; PLL can dejitter incoming clock

* Selectable PLL bandwidth; minimizes jitter peaking in downstream PLL's

* Spread

9DB233 General Description

The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectabl.

9DB233 Datasheet (343.09 KB)