9DMV0141
9DMV0141 is 2:1 1.8V PCIe Gen1-2-3 Clock Mux manufactured by Renesas.
Description
The 9DMV0141 is a member of IDT's SOC-Friendly 1.8V Very-Low-Power (VLP) PCIe Gen1-2-3 family. It has integrated output terminations providing Zo=100 for direct connection to 100 transmission lines. The output has an OE# pin for optimal system control and power management. The part provides asynchronous or glitch-free switching modes.
Typical Application
2:1 PCIe Gen1-2-3 Clock Multiplexer
Output Features
- 1 -Low-Power (LP) HCSL DIF pair w/ZO=100
Key Specifications
- DIF additive cycle-to-cycle jitter <5ps
- DIF phase jitter is PCIe Gen1-2-3 pliant
- 125MHz additive phase jitter 420fs rms typical (12k Hz to
20MHz)
Block Diagram
^OE0#
Features
- LP-HCSL output w/integrated terminations; saves 4 resistors pared to standard HCSL output
- 1.8V operation; 12m W typical power consumption
- Selectable asynchronous or glitch-free switching; allows the mux to be selected at power up even if both inputs are not running, then transition to glitch-free switching mode
- Spread Spectrum patible; supports EMI reduction
- OE# pins; support DIF power management
- HCSL differential inputs; can be driven by mon clock sources
- 1MHz to 200MHz operating frequency
- Configuration can be acplished with strapping pins;
SMBus interface not required for device control
- Space saving 16-pin 3x3mm VFQFPN; minimal board space
DIF_INA
DIF_INB v SW_MODE ^SEL_A_B#
A DIF0
9DMV0141 AUGUST 15, 2017
©2017 Integrated Device Technology, Inc.
9DMV0141 DATASHEET
Pin Configuration
DIF_INA# DIF_INA ^SEL_A_B# NC
GNDR 1 VDDR1.8 2 VDDR1.8 3
GNDR 4
16 15 14 13
12 VDD1.8 11 GND 10 DIF0#
9...
