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9FGV1006C - PCIe Gen1-5 Low-Power PhiClock Generators

Download the 9FGV1006C datasheet PDF. This datasheet also covers the 9FGV1002C variant, as both devices belong to the same pcie gen1-5 low-power phiclock generators family and are provided as variant models within a single manufacturer datasheet.

General Description

The 9FGV1002C / 9FGV1006C are members of the Renesas’ PhiClock™ programmable clock generator family.

These devices are optimized for low phase noise spread-spectrum applications such as PCIe® Express.

Key Features

  • 2 or 4 programmable output pairs plus 1 or 2 LVCMOS REF outputs.
  • 1MHz.
  • 325MHz LVDS or LP-HCSL outputs.
  • 1MHz.
  • 200MHz LVCMOS outputs Features.
  • 1.8V, 2.5V or 3.3V core power supplies.
  • Individual 1.8V, 2.5V or 3.3V VDDO for each output pair.
  • -40°C to +85°C operation.
  • standard product.
  • -40°C to +105°C operation.
  • 9FGV1002C automotive product.
  • Direct connection to HCSL, LVDS and LVCMOS inputs.
  • Renesas’ LP-HCSL technology imp.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (9FGV1002C-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 9FGV1006C
Manufacturer Renesas
File Size 1.11 MB
Description PCIe Gen1-5 Low-Power PhiClock Generators
Datasheet download datasheet 9FGV1006C Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
PCIe Gen1–7 Low-Power Programmable PhiClock™ Generators 9FGV1002C / 9FGV1006C Datasheet Description The 9FGV1002C / 9FGV1006C are members of the Renesas’ PhiClock™ programmable clock generator family. These devices are optimized for low phase noise spread-spectrum applications such as PCIe® Express. Four user-defined configurations may be selected via two hardware select pins or two I2C bits, allowing easy software selection of the desired configuration. Any one of the four OTP configurations may be specified as the default when operating in I2C mode.