9INT31H200 Key Features
- 2 HCSL differential pairs
- Qx output-to-output skew across all outputs: 5ps (typical)
- RMS additive phase jitter: 64fs typical (12kHz-20MHz at
- Extremely low additive phase jitter; supports DB200H requirements
- 3.3V operation; standard industry power supply
- 2 OE pins (1 for each output); easy control of clocks to CPU
- HCSL-patible input; supports popular devices
- 1MHz to 350MHz operating frequency; covers all popular
- Space saving 3 × 3 mm 16-QFN; minimal board space
- Top View
